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https://github.com/ARM-software/arm-trusted-firmware.git
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49abdfd8ce
STM32MP15xA and STM32MP15xD chip part numbers don't support the secure boot. All functions linked to secure boot must not be used and signed binaries are not allowed on such chip. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: I5b85f322f5eb3b64415e1819bd00fb2c99f20695
126 lines
4.1 KiB
C
126 lines
4.1 KiB
C
/*
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* Copyright (C) 2018-2022, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STM32MP_COMMON_H
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#define STM32MP_COMMON_H
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#include <stdbool.h>
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#include <platform_def.h>
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#define JEDEC_ST_BKID U(0x0)
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#define JEDEC_ST_MFID U(0x20)
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/* Functions to save and get boot context address given by ROM code */
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void stm32mp_save_boot_ctx_address(uintptr_t address);
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uintptr_t stm32mp_get_boot_ctx_address(void);
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uint16_t stm32mp_get_boot_itf_selected(void);
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bool stm32mp_is_single_core(void);
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bool stm32mp_is_closed_device(void);
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bool stm32mp_is_auth_supported(void);
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/* Return the base address of the DDR controller */
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uintptr_t stm32mp_ddrctrl_base(void);
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/* Return the base address of the DDR PHY */
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uintptr_t stm32mp_ddrphyc_base(void);
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/* Return the base address of the PWR peripheral */
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uintptr_t stm32mp_pwr_base(void);
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/* Return the base address of the RCC peripheral */
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uintptr_t stm32mp_rcc_base(void);
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/* Check MMU status to allow spinlock use */
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bool stm32mp_lock_available(void);
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int stm32_get_otp_index(const char *otp_name, uint32_t *otp_idx,
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uint32_t *otp_len);
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int stm32_get_otp_value(const char *otp_name, uint32_t *otp_val);
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int stm32_get_otp_value_from_idx(const uint32_t otp_idx, uint32_t *otp_val);
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/* Get IWDG platform instance ID from peripheral IO memory base address */
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uint32_t stm32_iwdg_get_instance(uintptr_t base);
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/* Return bitflag mask for expected IWDG configuration from OTP content */
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uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst);
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#if defined(IMAGE_BL2)
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/* Update OTP shadow registers with IWDG configuration from device tree */
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uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags);
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#endif
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#if STM32MP_UART_PROGRAMMER || !defined(IMAGE_BL2)
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/* Get the UART address from its instance number */
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uintptr_t get_uart_address(uint32_t instance_nb);
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#endif
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/* Setup the UART console */
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int stm32mp_uart_console_setup(void);
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/*
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* Platform util functions for the GPIO driver
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* @bank: Target GPIO bank ID as per DT bindings
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*
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* Platform shall implement these functions to provide to stm32_gpio
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* driver the resource reference for a target GPIO bank. That are
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* memory mapped interface base address, interface offset (see below)
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* and clock identifier.
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*
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* stm32_get_gpio_bank_offset() returns a bank offset that is used to
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* check DT configuration matches platform implementation of the banks
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* description.
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*/
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uintptr_t stm32_get_gpio_bank_base(unsigned int bank);
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unsigned long stm32_get_gpio_bank_clock(unsigned int bank);
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uint32_t stm32_get_gpio_bank_offset(unsigned int bank);
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bool stm32_gpio_is_secure_at_reset(unsigned int bank);
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/* Return node offset for target GPIO bank ID @bank or a FDT error code */
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int stm32_get_gpio_bank_pinctrl_node(void *fdt, unsigned int bank);
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/* Get the chip revision */
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uint32_t stm32mp_get_chip_version(void);
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/* Get the chip device ID */
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uint32_t stm32mp_get_chip_dev_id(void);
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/* Get SOC name */
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#define STM32_SOC_NAME_SIZE 20
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void stm32mp_get_soc_name(char name[STM32_SOC_NAME_SIZE]);
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/* Print CPU information */
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void stm32mp_print_cpuinfo(void);
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/* Print board information */
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void stm32mp_print_boardinfo(void);
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/* Initialise the IO layer and register platform IO devices */
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void stm32mp_io_setup(void);
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#if STM32MP_USE_STM32IMAGE
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/*
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* Check that the STM32 header of a .stm32 binary image is valid
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* @param header: pointer to the stm32 image header
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* @param buffer: address of the binary image (payload)
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* @return: 0 on success, negative value in case of error
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*/
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int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer);
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#endif /* STM32MP_USE_STM32IMAGE */
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/* Functions to map DDR in MMU with non-cacheable attribute, and unmap it */
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int stm32mp_map_ddr_non_cacheable(void);
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int stm32mp_unmap_ddr(void);
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/* Functions to save and get boot peripheral info */
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void stm32_save_boot_interface(uint32_t interface, uint32_t instance);
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void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance);
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#if !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT
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void stm32mp1_fwu_set_boot_idx(void);
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#endif /* !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT */
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#endif /* STM32MP_COMMON_H */
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