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BL2_AT_EL3 is an overloaded macro which has two uses: 1. When BL2 is entry point into TF-A(no BL1) 2. When BL2 is running at EL3 exception level These two scenarios are not exactly same even though first implicitly means second to be true. To distinguish between these two use cases we introduce new macros. BL2_AT_EL3 is renamed to RESET_TO_BL2 to better convey both 1. and 2. Additional macro BL2_RUNS_AT_EL3 is added to cover all scenarious where BL2 runs at EL3 (including four world systems). BREAKING CHANGE: BL2_AT_EL3 renamed to RESET_TO_BL2 across the repository. Change-Id: I477e1d0f843b44b799c216670e028fcb3509fb72 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
185 lines
5.2 KiB
Makefile
185 lines
5.2 KiB
Makefile
#
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# Copyright (c) 2019-2023, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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#
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# Translation tables library
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include lib/xlat_tables_v2/xlat_tables.mk
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PLAT_INCLUDES := -Iplat/imx/common/include \
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-Iplat/imx/imx8m/include \
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-Iplat/imx/imx8m/imx8mm/include \
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-Idrivers/imx/usdhc \
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-Iinclude/common/tbbr \
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-Iinclude/lib/libfdt
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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include lib/libfdt/libfdt.mk
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IMX_DRAM_SOURCES := plat/imx/imx8m/ddr/dram.c \
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plat/imx/imx8m/ddr/clock.c \
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plat/imx/imx8m/ddr/dram_retention.c \
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plat/imx/imx8m/ddr/ddr4_dvfs.c \
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plat/imx/imx8m/ddr/lpddr4_dvfs.c
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IMX_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c \
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plat/common/plat_psci_common.c \
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plat/imx/common/plat_imx8_gic.c
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BL31_SOURCES += plat/imx/common/imx8_helpers.S \
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plat/imx/imx8m/gpc_common.c \
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plat/imx/imx8m/imx_hab.c \
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plat/imx/imx8m/imx_aipstz.c \
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plat/imx/imx8m/imx_rdc.c \
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plat/imx/imx8m/imx8m_csu.c \
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plat/imx/imx8m/imx8m_caam.c \
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plat/imx/imx8m/imx8m_psci_common.c \
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plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c \
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plat/imx/imx8m/imx8mm/imx8mm_psci.c \
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plat/imx/imx8m/imx8mm/gpc.c \
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plat/imx/common/imx8_topology.c \
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plat/imx/common/imx_sip_handler.c \
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plat/imx/common/imx_sip_svc.c \
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plat/imx/common/imx_uart_console.S \
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lib/cpus/aarch64/cortex_a53.S \
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drivers/arm/tzc/tzc380.c \
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drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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${XLAT_TABLES_LIB_SRCS} \
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${IMX_DRAM_SOURCES} \
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${IMX_GIC_SOURCES}
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ifeq (${NEED_BL2},yes)
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BL2_SOURCES += common/desc_image_load.c \
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common/fdt_wrappers.c \
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plat/imx/common/imx8_helpers.S \
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plat/imx/common/imx_uart_console.S \
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plat/imx/imx8m/imx8mm/imx8mm_bl2_el3_setup.c \
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plat/imx/imx8m/imx8mm/gpc.c \
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plat/imx/imx8m/imx_aipstz.c \
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plat/common/plat_psci_common.c \
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lib/xlat_tables/aarch64/xlat_tables.c \
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lib/xlat_tables/xlat_tables_common.c \
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lib/cpus/aarch64/cortex_a53.S \
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drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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${PLAT_GIC_SOURCES} \
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${PLAT_DRAM_SOURCES} \
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drivers/mmc/mmc.c \
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drivers/io/io_block.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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drivers/io/io_storage.c \
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drivers/imx/usdhc/imx_usdhc.c \
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plat/imx/imx8m/imx8mm/imx8mm_bl2_mem_params_desc.c \
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plat/imx/common/imx_io_storage.c \
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plat/imx/imx8m/imx8m_image_load.c \
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lib/optee/optee_utils.c
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endif
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# Add the build options to pack BLx images and kernel device tree
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# in the FIP if the platform requires.
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ifneq ($(BL2),)
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RESET_TO_BL31 := 0
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$(eval $(call TOOL_ADD_PAYLOAD,${BUILD_PLAT}/tb_fw.crt,--tb-fw-cert))
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endif
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ifneq ($(BL32_EXTRA1),)
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$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
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endif
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ifneq ($(BL32_EXTRA2),)
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$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
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endif
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ifneq ($(HW_CONFIG),)
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$(eval $(call TOOL_ADD_IMG,HW_CONFIG,--hw-config))
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endif
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ifeq (${NEED_BL2},yes)
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$(eval $(call add_define,NEED_BL2))
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LOAD_IMAGE_V2 := 1
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# Non-TF Boot ROM
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RESET_TO_BL2 := 1
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endif
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ifneq (${TRUSTED_BOARD_BOOT},0)
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include drivers/auth/mbedtls/mbedtls_crypto.mk
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include drivers/auth/mbedtls/mbedtls_x509.mk
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AUTH_SOURCES := drivers/auth/auth_mod.c \
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drivers/auth/crypto_mod.c \
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drivers/auth/img_parser_mod.c \
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drivers/auth/tbbr/tbbr_cot_common.c \
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drivers/auth/tbbr/tbbr_cot_bl2.c
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BL2_SOURCES += ${AUTH_SOURCES} \
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plat/common/tbbr/plat_tbbr.c \
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plat/imx/imx8m/imx8mm/imx8mm_trusted_boot.c \
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plat/imx/imx8m/imx8mm/imx8mm_rotpk.S
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ROT_KEY = $(BUILD_PLAT)/rot_key.pem
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ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin
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$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
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$(eval $(call MAKE_LIB_DIRS))
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$(BUILD_PLAT)/bl2/imx8mm_rotpk.o: $(ROTPK_HASH)
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certificates: $(ROT_KEY)
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$(ROT_KEY): | $(BUILD_PLAT)
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@echo " OPENSSL $@"
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@if [ ! -f $(ROT_KEY) ]; then \
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${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null; \
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fi
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$(ROTPK_HASH): $(ROT_KEY)
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@echo " OPENSSL $@"
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$(Q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
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${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null
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endif
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ENABLE_PIE := 1
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USE_COHERENT_MEM := 1
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RESET_TO_BL31 := 1
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A53_DISABLE_NON_TEMPORAL_HINT := 0
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ERRATA_A53_835769 := 1
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ERRATA_A53_843419 := 1
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ERRATA_A53_855873 := 1
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BL32_BASE ?= 0xbe000000
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$(eval $(call add_define,BL32_BASE))
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BL32_SIZE ?= 0x2000000
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$(eval $(call add_define,BL32_SIZE))
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IMX_BOOT_UART_BASE ?= 0x30890000
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$(eval $(call add_define,IMX_BOOT_UART_BASE))
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EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
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ifeq (${SDEI_SUPPORT}, 1)
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BL31_SOURCES += plat/imx/common/imx_ehf.c \
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plat/imx/common/imx_sdei.c
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endif
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ifeq (${MEASURED_BOOT},1)
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MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
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$(info Including ${MEASURED_BOOT_MK})
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include ${MEASURED_BOOT_MK}
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ifneq (${MBOOT_EL_HASH_ALG}, sha256)
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$(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
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endif
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BL2_SOURCES += plat/imx/imx8m/imx8m_measured_boot.c \
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plat/imx/imx8m/imx8m_dyn_cfg_helpers.c \
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${EVENT_LOG_SOURCES}
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endif
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ifeq (${SPD},trusty)
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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endif
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