Arvind Ram Prakash 42d4d3baac refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 ... BL2_AT_EL3 is an overloaded macro which has two uses: 1. When BL2 is entry point into TF-A(no BL1) 2. When BL2 is running at EL3 exception level These two scenarios are not exactly same even though first implicitly means second to be true. To distinguish between these two use cases we introduce new macros. BL2_AT_EL3 is renamed to RESET_TO_BL2 to better convey both 1. and 2. Additional macro BL2_RUNS_AT_EL3 is added to cover all scenarious where BL2 runs at EL3 (including four world systems). BREAKING CHANGE: BL2_AT_EL3 renamed to RESET_TO_BL2 across the repository. Change-Id: I477e1d0f843b44b799c216670e028fcb3509fb72 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>		2023-03-15 11:43:14 +00:00
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allwinner	fix(allwinner): check RSB availability in DT on H6	2023-02-03 13:31:28 +00:00
amlogic	Plat AXG: Fix PLAT_MAX_PWR_LVL value	2020-12-29 13:52:11 +00:00
arm	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
brcm	refactor(libc): clean up dependencies in libc	2022-09-22 13:23:49 +02:00
common	Merge changes from topic "panic_cleanup" into integration	2023-02-23 23:38:26 +01:00
hisilicon	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
imx	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
intel/soc	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
marvell	build: always prefix section names with .	2023-02-20 18:29:33 +00:00
mediatek	build: always prefix section names with .	2023-02-20 18:29:33 +00:00
nvidia/tegra	fix(tegra210): support legacy SMC_ID 0xC2FEFE00	2023-03-09 21:59:52 +02:00
nxp	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
qemu	build: always prefix section names with .	2023-02-20 18:29:33 +00:00
qti	feat(aarch64): make ID system register reads non-volatile	2023-01-11 16:02:57 +00:00
renesas	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
rockchip	build: always prefix section names with .	2023-02-20 18:29:33 +00:00
rpi	fix(rpi3): tighten platform pwr_domain_pwr_down_wfi behaviour	2022-10-27 13:46:02 +01:00
socionext	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
st	refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3	2023-03-15 11:43:14 +00:00
ti/k3	build: always prefix section names with .	2023-02-20 18:29:33 +00:00
xilinx	fix(xilinx): handle CRC failure in IPI callback	2023-03-09 15:05:37 +05:30