Arvind Ram Prakash b1bde25ed9 fix(cpus): workaround for Cortex-A720 erratum 2792132 ... Cortex-A720 erratum 2792132 is a Cat B erratum that is present in revision r0p0, r0p1 and is fixed in r0p2. The workaround is to set bit[26] of the CPUACTLR2_EL1 to 1. SDEN documentation: https://developer.arm.com/documentation/SDEN2439421/latest Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I8d11fe65a2ab5f79244cc3395d0645f77256304c		2024-08-19 15:19:08 -05:00
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alt-boot-flows.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
auth-framework.rst	docs(auth): add missing AUTH_PARAM_NV_CTR value	2024-02-02 15:32:34 +01:00
cpu-specific-build-macros.rst	fix(cpus): workaround for Cortex-A720 erratum 2792132	2024-08-19 15:19:08 -05:00
firmware-design.rst	refactor(mte): remove mte, mte_perm	2024-03-26 14:30:58 -05:00
index.rst	docs: add top level section numbering	2022-11-16 14:06:48 +00:00
interrupt-framework-design.rst	Fix broken links to various sections across docs	2020-08-03 09:55:04 -05:00
psci-pd-tree.rst	doc: Set correct syntax highlighting style	2019-05-22 11:28:17 +01:00
reset-design.rst	docs: update RESET_TO_BL31 documentation	2023-03-09 14:42:49 +00:00
trusted-board-boot-build.rst	docs(arm): add ARM_ROTPK_LOCATION variant full key	2022-12-09 14:55:39 -06:00
trusted-board-boot.rst	docs(auth): align TBBR CoT names to match the code	2024-02-26 12:39:06 +00:00