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fix(cpus): workaround for Cortex-A720 erratum 2792132

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Cortex-A720 erratum 2792132 is a Cat B erratum that is present
in revision r0p0, r0p1 and is fixed in r0p2.

The workaround is to set bit[26] of the CPUACTLR2_EL1 to 1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2439421/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I8d11fe65a2ab5f79244cc3395d0645f77256304c
This commit is contained in:
Arvind Ram Prakash 2024-07-19 15:59:17 -05:00
parent 553b70c3ef
commit b1bde25ed9
3 changed files with 14 additions and 0 deletions
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4
docs/design/cpu-specific-build-macros.rst
View file

@ -940,6 +940,10 @@ For Cortex-A715, the following errata build flags are defined :
For Cortex-A720, the following errata build flags are defined :
- ``ERRATA_A720_2792132``: This applies errata 2792132 workaround to
Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
It is fixed in r0p2.
- ``ERRATA_A720_2844092``: This applies errata 2844092 workaround to
Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
It is fixed in r0p2.

6
lib/cpus/aarch64/cortex_a720.S
View file

@ -26,6 +26,12 @@
wa_cve_2022_23960_bhb_vector_table CORTEX_A720_BHB_LOOP_COUNT, cortex_a720
#endif /* WORKAROUND_CVE_2022_23960 */
workaround_reset_start cortex_a720, ERRATUM(2792132), ERRATA_A720_2792132
sysreg_bit_set CORTEX_A720_CPUACTLR2_EL1, BIT(26)
workaround_reset_end cortex_a720, ERRATUM(2792132)
check_erratum_ls cortex_a720, ERRATUM(2792132), CPU_REV(0, 1)
workaround_reset_start cortex_a720, ERRATUM(2844092), ERRATA_A720_2844092
sysreg_bit_set CORTEX_A720_CPUACTLR4_EL1, BIT(11)
workaround_reset_end cortex_a720, ERRATUM(2844092)

4
lib/cpus/cpu-ops.mk
View file

@ -964,6 +964,10 @@ CPU_FLAG_LIST += ERRATA_A715_2561034
# only to revision r0p0, r1p0 and r1p1. It is fixed in r1p2.
CPU_FLAG_LIST += ERRATA_A715_2728106
# Flag to apply erratum 2792132 workaround during reset. This erratum applies
# to revisions r0p0 and r0p1. It is fixed in r0p2.
CPU_FLAG_LIST += ERRATA_A720_2792132
# Flag to apply erratum 2844092 workaround during reset. This erratum applies
# to revisions r0p0 and r0p1. It is fixed in r0p2.
CPU_FLAG_LIST += ERRATA_A720_2844092