Marcin Juszkiewicz 408cde8a59 fix(qemu_sbsa): align FIP base to BL1 size ... RME patch series shown that we can build larger BL1 than we can run: NOTICE: Booting Trusted Firmware NOTICE: BL1: v2.9(debug):v2.9.0-736-g08548888a NOTICE: BL1: Built : 12:10:39, Sep 18 2023 INFO: BL1: RAM 0x3ffee000 - 0x3fffb000 INFO: BL1: Loading BL2 WARNING: Firmware Image Package header check failed. RME pushed debug build BL1 over 0x8000 in size. This exposed an error where FIP_BASE (supposed to be at BL1_SIZE offset from start of flash) was actually 0x8000 and not 0x12000. Make sure we have space for BL1 by deriving FIP_BASE from it. Note: this is a breaking change for edk2 FD image generation, which had similarly hardcoded a 0x8000 offset. These images must be updated in lock-step. Change-Id: I8a1a85e82319945a4412c424467d818d5b6e4ecd Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>		2023-09-18 13:00:40 +01:00
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common	Merge "feat(qemu): add A55 cpu support for virt" into integration	2023-09-15 08:20:15 +02:00
qemu	feat(qemu): add dummy plat_mboot_measure_key() BL1 function	2023-09-07 09:37:52 +02:00
qemu_sbsa	fix(qemu_sbsa): align FIP base to BL1 size	2023-09-18 13:00:40 +01:00