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Boyan Karatotev 3f4c1e1e7b feat(cpus): add a concise way to implement AArch64 errata
Errata implementation involves adding a lot of boilerplate to random
places with just conventions on how to do them. Copy pasting is the
usual method for doing this. The result is an error-prone and verbose
patch that is a nightmare to get through review.

Errata workarounds have a very large degree of similarity - most of them
involve setting a bit at reset. As such most of the boilerplate is not
strictly necessary. To solve this, add a collection of assembly macros
to wrap errata implementations such that only the actual mitigations
need to be written. A new erratum mitigation looks something like:

  workaround_reset_start cortex_a77, ERRATUM(1925769), ERRATA_A77_1925769
    sysreg_bit_set CORTEX_A77_CPUECTLR_EL1, CORTEX_A77_CPUECTLR_EL1_BIT_8
  workaround_reset_end cortex_a77, ERRATUM(1925769)

  check_erratum_ls cortex_a77, ERRATUM(1925769), CPU_REV(1, 1)

Note, that the long comment on every mitigation is missing. This is on
purpose, as this new format includes all of its contents into an easily
readable format.

The workaround wrappers add an erratum entry (24 bytes) to a per-cpu
data structure which can then be read by a standard reset function to
apply all errata automatically. This has the added benefit of collecting
all errata TF-A knows about in a central way, which was previously
missing. This can then be used at runtime with the errata ABI.

If an erratum doesn't fit this standard definition (eg. the
CVE_2022_23960), it can progressively be unwrapped to the old
convention. The only differences are that the naming format is slightly
more verbose and a call to add_erratum_entry is needed to inform the
framework about the errata.

Finally, the internal workaround names change a tiny bit, especially
CVEs.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Iac644f85dcf85b8279b25e83baf1e7d08b253b16
2023-05-30 09:31:15 +01:00
.husky build(hooks): allow hooks to skip Commitizen 2023-04-18 17:38:20 +01:00
bl1 refactor(cpus): rename errata_report.h to errata.h 2023-05-30 09:31:15 +01:00
bl2 refactor(cpus): convert print_errata_status to C 2023-05-30 09:31:15 +01:00
bl2u build(bl2u): sort sections by alignment by default 2023-04-17 17:15:34 +01:00
bl31 Merge "fix(pmu): unconditionally save PMCR_EL0" into integration 2023-05-10 14:12:25 +02:00
bl32 fix(tsp): flush uart console 2023-05-22 13:22:42 -05:00
common refactor(cpufeat): enable FEAT_RAS for FEAT_STATE_CHECKED 2023-05-09 13:20:01 +01:00
docs Merge "feat(rme): save PAuth context when RME is enabled" into integration 2023-05-24 14:23:38 +02:00
drivers refactor(cpus): move cpu_ops field defines to a header 2023-05-30 09:31:15 +01:00
fdts Merge "fix(stm32mp15-fdts): use /omit-if-no-ref/ for spi and i2c" into integration 2023-04-13 16:33:27 +02:00
include feat(cpus): add a concise way to implement AArch64 errata 2023-05-30 09:31:15 +01:00
lib refactor(cpus): convert print_errata_status to C 2023-05-30 09:31:15 +01:00
licenses docs(license): rectify arm-gic.h license 2021-04-26 12:36:00 +01:00
make_helpers Merge changes from topic "mp/feat_ras" into integration 2023-05-09 21:48:45 +02:00
plat refactor(cpus): convert print_errata_status to C 2023-05-30 09:31:15 +01:00
services refactor(cpus): rename errata_report.h to errata.h 2023-05-30 09:31:15 +01:00
tools docs(changelog): changelog for v2.9 release 2023-05-19 13:49:08 -05:00
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch 2019-07-12 11:06:24 +01:00
.commitlintrc.js build(commitlint): make the scope optional 2022-05-03 11:06:50 +02:00
.cz.json refactor(hooks): replace cz-conventional-changelog with cz-commitlint 2022-01-24 12:55:00 +00:00
.editorconfig .editorconfig: set max line length to 100 2020-12-03 15:39:23 +00:00
.gitignore chore: add dependency files generated by tools to .gitignore 2023-04-05 09:47:15 +01:00
.gitreview Specify integration as the default branch for git-review 2020-04-02 07:57:17 +00:00
.nvmrc build(npm): add NVM version file 2022-10-10 13:24:22 +01:00
.readthedocs.yaml fix: pin poetry to version used in CI 2023-05-20 10:16:50 +01:00
.versionrc.js feat: add support for poetry 2023-04-19 14:38:24 +01:00
changelog.yaml docs(changelog): changelog for v2.9 release 2023-05-19 13:49:08 -05:00
dco.txt Drop requirement for CLA in contribution.md 2016-09-27 21:52:03 +01:00
license.rst doc: De-duplicate readme and license files 2019-10-08 16:36:15 +00:00
Makefile refactor(cpus): move cpu_ops field defines to a header 2023-05-30 09:31:15 +01:00
package-lock.json docs(changelog): changelog for v2.9 release 2023-05-19 13:49:08 -05:00
package.json docs(changelog): changelog for v2.9 release 2023-05-19 13:49:08 -05:00
poetry.lock fix: add missing click dependency 2023-04-24 17:37:38 +01:00
pyproject.toml docs(changelog): changelog for v2.9 release 2023-05-19 13:49:08 -05:00
readme.rst doc: Formatting fixes for readme.rst 2019-10-09 15:37:59 +00:00

Trusted Firmware-A
==================

Trusted Firmware-A (TF-A) is a reference implementation of secure world software
for `Arm A-Profile architectures`_ (Armv8-A and Armv7-A), including an Exception
Level 3 (EL3) `Secure Monitor`_. It provides a suitable starting point for
productization of secure world boot and runtime firmware, in either the AArch32
or AArch64 execution states.

TF-A implements Arm interface standards, including:

-  `Power State Coordination Interface (PSCI)`_
-  `Trusted Board Boot Requirements CLIENT (TBBR-CLIENT)`_
-  `SMC Calling Convention`_
-  `System Control and Management Interface (SCMI)`_
-  `Software Delegated Exception Interface (SDEI)`_

The code is designed to be portable and reusable across hardware platforms and
software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A
with reference implementations of Arm standards to benefit developers working
with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration
testing, on any secure world code derived from TF-A.

More Info and Documentation
---------------------------

To find out more about Trusted Firmware-A, please `view the full documentation`_
that is available through `trustedfirmware.org`_.

--------------

*Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.*

.. _Armv7-A and Armv8-A: https://developer.arm.com/products/architecture/a-profile
.. _Secure Monitor: http://www.arm.com/products/processors/technologies/trustzone/tee-smc.php
.. _Power State Coordination Interface (PSCI): PSCI_
.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
.. _Trusted Board Boot Requirements CLIENT (TBBR-CLIENT): https://developer.arm.com/docs/den0006/latest/trusted-board-boot-requirements-client-tbbr-client-armv8-a
.. _SMC Calling Convention: http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf
.. _System Control and Management Interface (SCMI): SCMI_
.. _SCMI: http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
.. _Software Delegated Exception Interface (SDEI): SDEI_
.. _SDEI: http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf
.. _Arm A-Profile architectures: https://developer.arm.com/architectures/cpu-architecture/a-profile
.. _view the full documentation: https://www.trustedfirmware.org/docs/tf-a
.. _trustedfirmware.org: http://www.trustedfirmware.org