Mathieu Poirier 26da60e2a0 feat(qemu-sbsa): dissociate QEMU NS start address and NS_DRAM0_BASE ... When RME is enabled the RMM is placed at the bottom of the NS RAM, meaning that NS_DRAM0_BASE has to be located after that. This patch disscociates the base of the NS RAM as defined by QEMU by introducing a new define, PLAT_QEMU_DRAM0_BASE. An offset can be added to that new define when the software's view of the base memory need to differ from QEMU. No change in functionality. Change-Id: I887f9993d5a61896352cfff17e0d92e2c2b9030a Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>		2024-12-06 11:20:43 -07:00
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common	refactor(qemu-sbsa): rename function sip_svc_init() to something more meaningful	2024-12-06 11:20:43 -07:00
qemu	refactor(qemu): make L0GPT size configurable	2024-12-06 11:20:43 -07:00
qemu_sbsa	feat(qemu-sbsa): dissociate QEMU NS start address and NS_DRAM0_BASE	2024-12-06 11:20:43 -07:00