arm-trusted-firmware/include/lib/cpus/aarch64/cortex_gelas.h
Manish Pandey fcb80d7d14 Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration
* changes:
  fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset
  chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi`
  chore(psci): drop skip_wfi variable
  feat(arm): convert arm platforms to expect a wakeup
  fix(cpus): avoid SME related loss of context on powerdown
  feat(psci): allow cores to wake up from powerdown
  refactor: panic after calling psci_power_down_wfi()
  refactor(cpus): undo errata mitigations
  feat(cpus): add sysreg_bit_toggle
2025-02-11 16:52:18 +01:00

26 lines
890 B
C

/*
* Copyright (c) 2023-2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef CORTEX_GELAS_H
#define CORTEX_GELAS_H
#include <lib/utils_def.h>
#define CORTEX_GELAS_MIDR U(0x410FD8B0)
/*******************************************************************************
* CPU Extended Control register specific definitions
******************************************************************************/
#define CORTEX_GELAS_IMP_CPUECTLR_EL1 S3_0_C15_C1_5
#define CPUECTLR2_EL1_EXTLLC_BIT 10
/*******************************************************************************
* CPU Power Control register specific definitions
******************************************************************************/
#define CORTEX_GELAS_CPUPWRCTLR_EL1 S3_0_C15_C2_7
#define CORTEX_GELAS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
#endif /* CORTEX_GELAS_H */