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6ad216dca5
Change-Id: I645442d52a295706948e2cac88c36c1a3cb0bc47 Signed-off-by: Imre Kis <imre.kis@arm.com>
31 lines
1.1 KiB
C
31 lines
1.1 KiB
C
/*
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* Copyright (c) 2019, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef CORTEX_A65_H
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#define CORTEX_A65_H
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#include <lib/utils_def.h>
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#define CORTEX_A65_MIDR U(0x410FD060)
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/*******************************************************************************
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* CPU Extended Control register specific definitions
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******************************************************************************/
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#define CORTEX_A65_ECTLR_EL1 S3_0_C15_C1_4
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/*******************************************************************************
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* CPU Auxiliary Control register specific definitions
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******************************************************************************/
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#define CORTEX_A65_CPUACTLR_EL1 S3_0_C15_C1_0
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/*******************************************************************************
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* CPU Power Control register specific definitions
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******************************************************************************/
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#define CORTEX_A65_CPUPWRCTLR_EL1 S3_0_C15_C2_7
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#define CORTEX_A65_CPUPWRCTLR_EL1_CORE_PWRDN_BIT (U(1) << 0)
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#endif /* CORTEX_A65_H */
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