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Andre Przywara 5f5d076387 Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703 
Neoverse N1 erratum 1315703 is a Cat A (rare) erratum [1], present in
older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined CPUACTLR2_EL1
system register, which will disable the load-bypass-store feature.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdocpjdoc-466751330-1032/index.html

Change-Id: I5c708dbe0efa4daa0bcb6bd9622c5efe19c03af9
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2019-06-06 14:27:37 +01:00
..
auth-framework.rst doc: Use proper note and warning annotations 2019-05-22 11:28:17 +01:00
cpu-specific-build-macros.rst Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703 2019-06-06 14:27:37 +01:00
firmware-design.rst Further fixes to documentation links 2019-05-30 10:20:07 +01:00
index.rst doc: Move documents into subdirectories 2019-05-21 15:05:56 +01:00
interrupt-framework-design.rst doc: Use proper note and warning annotations 2019-05-22 11:28:17 +01:00
psci-pd-tree.rst doc: Set correct syntax highlighting style 2019-05-22 11:28:17 +01:00
reset-design.rst doc: Use proper note and warning annotations 2019-05-22 11:28:17 +01:00
trusted-board-boot.rst Further fixes to documentation links 2019-05-30 10:20:07 +01:00