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Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703
Neoverse N1 erratum 1315703 is a Cat A (rare) erratum [1], present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the implementation defined CPUACTLR2_EL1 system register, which will disable the load-bypass-store feature. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdocpjdoc-466751330-1032/index.html Change-Id: I5c708dbe0efa4daa0bcb6bd9622c5efe19c03af9 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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4 changed files with 49 additions and 2 deletions
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@ -226,6 +226,9 @@ For Cortex-A76, the following errata build flags are defined :
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- ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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- ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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DSU Errata Workarounds
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----------------------
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@ -35,7 +35,8 @@
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******************************************************************************/
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#define NEOVERSE_N1_CPUACTLR2_EL1 S3_0_C15_C1_1
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#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_2 (ULL(1) << 2)
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#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_2 (ULL(1) << 2)
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#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_16 (ULL(1) << 16)
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/* Instruction patching registers */
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#define CPUPSELR_EL3 S3_6_C15_C8_0
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@ -16,7 +16,7 @@
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#endif
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata
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* Errata Workaround for Neoverse N1 Erratum 1043202.
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* This applies to revision r0p0 and r1p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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@ -70,6 +70,35 @@ func neoverse_n1_disable_speculative_loads
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ret
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endfunc neoverse_n1_disable_speculative_loads
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Erratum 1315703.
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* This applies to revision <= r3p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1315703_wa
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/* Compare x0 against revision r3p1 */
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mov x17, x30
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bl check_errata_1315703
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cbz x0, 1f
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mrs x0, NEOVERSE_N1_CPUACTLR2_EL1
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orr x0, x0, #NEOVERSE_N1_CPUACTLR2_EL1_BIT_16
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msr NEOVERSE_N1_CPUACTLR2_EL1, x0
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isb
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1:
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ret x17
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endfunc errata_n1_1315703_wa
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func check_errata_1315703
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/* Applies to everything <= r3p0. */
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mov x1, #0x30
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b cpu_rev_var_ls
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endfunc check_errata_1315703
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func neoverse_n1_reset_func
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mov x19, x30
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@ -89,6 +118,11 @@ func neoverse_n1_reset_func
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bl errata_n1_1043202_wa
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#endif
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#if ERRATA_N1_1315703
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mov x0, x18
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bl errata_n1_1315703_wa
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#endif
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#if ENABLE_AMU
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/* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
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mrs x0, actlr_el3
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@ -141,6 +175,7 @@ func neoverse_n1_errata_report
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* checking functions of each errata.
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*/
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report_errata ERRATA_N1_1043202, neoverse_n1, 1043202
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report_errata ERRATA_N1_1315703, neoverse_n1, 1315703
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ldp x8, x30, [sp], #16
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ret
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@ -238,6 +238,10 @@ ERRATA_A76_1286807 ?=0
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# only to r0p0 and r1p0 of the Neoverse N1 cpu.
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ERRATA_N1_1043202 ?=1
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# Flag to apply erratum 1315703 workaround during reset. This erratum applies
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# to revisions before r3p1 of the Neoverse N1 cpu.
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ERRATA_N1_1315703 ?=1
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# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
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# Applying the workaround results in higher DSU power consumption on idle.
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ERRATA_DSU_798953 ?=0
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@ -427,6 +431,10 @@ $(eval $(call add_define,ERRATA_A76_1286807))
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$(eval $(call assert_boolean,ERRATA_N1_1043202))
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$(eval $(call add_define,ERRATA_N1_1043202))
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# Process ERRATA_N1_1315703 flag
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$(eval $(call assert_boolean,ERRATA_N1_1315703))
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$(eval $(call add_define,ERRATA_N1_1315703))
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# Process ERRATA_DSU_798953 flag
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$(eval $(call assert_boolean,ERRATA_DSU_798953))
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$(eval $(call add_define,ERRATA_DSU_798953))
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