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152f4cfa16
Cortex-A720 erratum 2926083 is a Cat B erratum that is present in revisions r0p0, r0p1 and is fixed in r0p2. The errata is only present when SPE (Statistical Profiling Extension) is implemented and enabled. The workaround is to set bits[58:57] of the CPUACTLR_EL1 to 'b11 when SPE is "implemented and enabled". SDEN documentation: https://developer.arm.com/documentation/SDEN2439421/latest Change-Id: I30182c3893416af65b55fca9a913cb4512430434 Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Signed-off-by: Govindraj Raja <govindraj.raja@arm.com> |
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| .. | ||
| _static/css | ||
| about | ||
| components | ||
| design | ||
| design_documents | ||
| getting_started | ||
| perf | ||
| plat | ||
| process | ||
| resources | ||
| security_advisories | ||
| threat_model | ||
| tools | ||
| change-log.md | ||
| conf.py | ||
| global_substitutions.txt | ||
| glossary.rst | ||
| index.rst | ||
| license.rst | ||
| Makefile | ||
| porting-guide.rst | ||