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13fc020d1b
The boot sequence mentioned in the documentation referred to an older boot flow. This patch updates the boot sequence to the TBBR boot flow that is currently being followed. Signed-off-by: Deepthi Peter <deepthi.peter@arm.com> Change-Id: I183458cea6d43dcf8acba2e0422920ab5541fdfc
43 lines
1.7 KiB
ReStructuredText
43 lines
1.7 KiB
ReStructuredText
Morello Platform
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================
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Morello is an ARMv8-A platform that implements the capability architecture extension.
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The platform port present at `site <https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git>`_
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provides ARMv8-A architecture enablement.
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Capability architecture specific changes will be added `here <https://git.morello-project.org/morello>`_
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Further information on Morello Platform is available at `info <https://developer.arm.com/architectures/cpu-architecture/a-profile/morello>`_
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Boot Sequence
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-------------
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The SCP initializes the RVBAR registers to point to the AP_BL1. Once RVBAR is
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initialized, the primary core is powered on. The primary core boots the AP_BL1.
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It performs minimum initialization necessary to load and authenticate the AP
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firmware image (the FIP image) from the AP QSPI NOR Flash Memory into the
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Trusted SRAM.
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AP_BL1 authenticates and loads the AP_BL2 image. AP_BL2 performs additional
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initializations, and then authenticates and loads the AP_BL31 and AP_BL33.
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AP_BL2 then transfers execution control to AP_BL31, which is the EL3 runtime
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firmware. Execution is finally handed off to AP_BL33, which is the non-secure
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world (UEFI).
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SCP -> AP_BL1 -> AP_BL2 -> AP_BL31 -> AP_BL33
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Build Procedure (TF-A only)
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~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- Obtain arm `toolchain <https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads>`_.
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Set the CROSS_COMPILE environment variable to point to the toolchain folder.
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- Build TF-A:
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.. code:: shell
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export CROSS_COMPILE=<path-to-aarch64-gcc>/bin/aarch64-none-elf-
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make PLAT=morello all
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*Copyright (c) 2020-2023, Arm Limited. All rights reserved.*
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