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106c4283a5
Erratum ID 2701951 is an erratum that could affect platforms that do not use an Arm interconnect IP. This was originally added to the list of Cortex-A715 in the errata ABI files. Fixed this by adding it to the Cortex-X3 list. SDEN documentation: https://developer.arm.com/documentation/2055130/latest Change-Id: I6ffaf4360a4a2d0a23c253a2326c178e010c8e45 Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
52 lines
1.4 KiB
C
52 lines
1.4 KiB
C
/*
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* Copyright (c) 2023-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef ERRATA_CPUSPEC_H
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#define ERRATA_CPUSPEC_H
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#include <stdint.h>
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#include <arch_helpers.h>
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#if __aarch64__
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#include <cortex_a710.h>
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#include <cortex_a78.h>
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#include <cortex_a78_ae.h>
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#include <cortex_a78c.h>
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#include <cortex_x2.h>
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#include <cortex_x3.h>
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#include <neoverse_n2.h>
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#include <neoverse_v1.h>
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#include <neoverse_v2.h>
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#endif
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/* Max number of platform based errata with no workaround in EL3 */
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#define MAX_PLAT_CPU_ERRATA_ENTRIES 2
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#define ERRATA_LIST_END (MAX_PLAT_CPU_ERRATA_ENTRIES - 1)
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/* Default values for unused memory in the array */
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#define UNDEF_ERRATA {UINT_MAX, UCHAR_MAX, UCHAR_MAX}
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#define EXTRACT_PARTNUM(x) ((x >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
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#define RXPX_RANGE(x, y, z) (((x >= y) && (x <= z)) ? true : false)
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/*
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* CPU specific values for errata handling
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*/
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struct em_cpu{
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unsigned int em_errata_id;
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unsigned char em_rxpx_lo; /* lowest revision of errata applicable for the cpu */
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unsigned char em_rxpx_hi; /* highest revision of errata applicable for the cpu */
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};
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struct em_cpu_list{
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unsigned long cpu_partnumber; /* cpu specific part number defined in midr reg */
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struct em_cpu cpu_errata_list[MAX_PLAT_CPU_ERRATA_ENTRIES];
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};
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int32_t verify_errata_implemented(uint32_t errata_id, uint32_t forward_flag);
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#endif /* ERRATA_CPUSPEC_H */
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