mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-17 01:54:22 +00:00
0d020822ae
Similar to the cpu_rev_var and cpu_ger_rev_var functions, inline the call_reset_handler handler. This way we skip the costly branch at no extra cost as this is the only place where this is called. While we're at it, drop the options for CPU_NO_RESET_FUNC. The only cpus that need that are virtual cpus which can spare the tiny bit of performance lost. The rest are real cores which can save on the check for zero. Now is a good time to put the assert for a missing cpu in the get_cpu_ops_ptr function so that it's a bit better encapsulated. Change-Id: Ia7c3dcd13b75e5d7c8bafad4698994ea65f42406 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
75 lines
1.8 KiB
ArmAsm
75 lines
1.8 KiB
ArmAsm
/*
|
|
* Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
#include <arch.h>
|
|
#include <asm_macros.S>
|
|
#include <cpu_macros.S>
|
|
#include <qemu_max.h>
|
|
|
|
func qemu_max_core_pwr_dwn
|
|
/* ---------------------------------------------
|
|
* Disable the Data Cache.
|
|
* ---------------------------------------------
|
|
*/
|
|
mrs x1, sctlr_el3
|
|
bic x1, x1, #SCTLR_C_BIT
|
|
msr sctlr_el3, x1
|
|
isb
|
|
|
|
/* ---------------------------------------------
|
|
* Flush L1 cache to L2.
|
|
* ---------------------------------------------
|
|
*/
|
|
mov x18, lr
|
|
mov x0, #DCCISW
|
|
bl dcsw_op_level1
|
|
mov lr, x18
|
|
ret
|
|
endfunc qemu_max_core_pwr_dwn
|
|
|
|
func qemu_max_cluster_pwr_dwn
|
|
/* ---------------------------------------------
|
|
* Disable the Data Cache.
|
|
* ---------------------------------------------
|
|
*/
|
|
mrs x1, sctlr_el3
|
|
bic x1, x1, #SCTLR_C_BIT
|
|
msr sctlr_el3, x1
|
|
isb
|
|
|
|
/* ---------------------------------------------
|
|
* Flush all caches to PoC.
|
|
* ---------------------------------------------
|
|
*/
|
|
mov x0, #DCCISW
|
|
b dcsw_op_all
|
|
endfunc qemu_max_cluster_pwr_dwn
|
|
|
|
cpu_reset_func_start qemu_max
|
|
cpu_reset_func_end qemu_max
|
|
|
|
/* ---------------------------------------------
|
|
* This function provides cpu specific
|
|
* register information for crash reporting.
|
|
* It needs to return with x6 pointing to
|
|
* a list of register names in ascii and
|
|
* x8 - x15 having values of registers to be
|
|
* reported.
|
|
* ---------------------------------------------
|
|
*/
|
|
.section .rodata.qemu_max_regs, "aS"
|
|
qemu_max_regs: /* The ascii list of register names to be reported */
|
|
.asciz "" /* no registers to report */
|
|
|
|
func qemu_max_cpu_reg_dump
|
|
adr x6, qemu_max_regs
|
|
ret
|
|
endfunc qemu_max_cpu_reg_dump
|
|
|
|
|
|
/* cpu_ops for QEMU MAX */
|
|
declare_cpu_ops qemu_max, QEMU_MAX_MIDR, qemu_max_reset_func, \
|
|
qemu_max_core_pwr_dwn, \
|
|
qemu_max_cluster_pwr_dwn
|