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09d40e0e08
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
130 lines
4 KiB
C
130 lines
4 KiB
C
/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdint.h>
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#include <platform_def.h>
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#include <common/debug.h>
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#include <drivers/arm/tzc400.h>
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#include <drivers/st/stm32mp1_clk.h>
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#include <drivers/st/stm32mp1_rcc.h>
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#include <dt-bindings/clock/stm32mp1-clks.h>
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#include <lib/mmio.h>
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#include <stm32mp1_dt.h>
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#include <stm32mp1_private.h>
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/*******************************************************************************
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* Initialize the TrustZone Controller. Configure Region 0 with Secure RW access
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* and allow Non-Secure masters full access.
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******************************************************************************/
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static void init_tzc400(void)
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{
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unsigned long long region_base, region_top;
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unsigned long long ddr_base = STM32MP1_DDR_BASE;
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unsigned long long ddr_size = (unsigned long long)dt_get_ddr_size();
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tzc400_init(STM32MP1_TZC_BASE);
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tzc400_disable_filters();
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/* Region 1 set to cover all DRAM at 0xC000_0000. Apply the
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* same configuration to all filters in the TZC.
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*/
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region_base = ddr_base;
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region_top = ddr_base + (ddr_size - 1U);
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tzc400_configure_region(STM32MP1_FILTER_BIT_ALL, 1,
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region_base,
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region_top,
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TZC_REGION_S_RDWR,
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_A7_ID) |
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_GPU_ID) |
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_LCD_ID) |
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_MDMA_ID) |
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DMA_ID) |
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_HOST_ID) |
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_OTG_ID) |
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_SDMMC_ID) |
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_ETH_ID) |
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DAP_ID));
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/* Raise an exception if a NS device tries to access secure memory */
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tzc400_set_action(TZC_ACTION_ERR);
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tzc400_enable_filters();
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}
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/*******************************************************************************
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* Initialize the TrustZone Controller.
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* Early initialization create only one region with full access to secure.
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* This setting is used before and during DDR initialization.
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******************************************************************************/
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static void early_init_tzc400(void)
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{
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uint32_t rstsr, rst_standby;
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rstsr = mmio_read_32(RCC_BASE + RCC_MP_RSTSCLRR);
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/* No warning if return from (C)STANDBY */
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rst_standby = rstsr &
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(RCC_MP_RSTSCLRR_STDBYRSTF | RCC_MP_RSTSCLRR_CSTDBYRSTF);
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if (stm32mp1_clk_is_enabled(TZC1) && (rst_standby == 0U)) {
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WARN("TZC400 port 1 clock already enable\n");
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}
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if (stm32mp1_clk_is_enabled(TZC2) && (rst_standby == 0U)) {
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WARN("TZC400 port 2 clock already enable\n");
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}
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if (stm32mp1_clk_enable(TZC1) != 0) {
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ERROR("Cannot enable TZC1 clock\n");
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panic();
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}
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if (stm32mp1_clk_enable(TZC2) != 0) {
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ERROR("Cannot enable TZC2 clock\n");
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panic();
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}
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tzc400_init(STM32MP1_TZC_BASE);
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tzc400_disable_filters();
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/*
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* Region 1 set to cover Non-Secure DRAM at 0x8000_0000. Apply the
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* same configuration to all filters in the TZC.
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*/
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tzc400_configure_region(STM32MP1_FILTER_BIT_ALL, 1,
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STM32MP1_DDR_BASE,
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STM32MP1_DDR_BASE +
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(STM32MP1_DDR_MAX_SIZE - 1U),
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TZC_REGION_S_RDWR,
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TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_SDMMC_ID));
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/* Raise an exception if a NS device tries to access secure memory */
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tzc400_set_action(TZC_ACTION_ERR);
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tzc400_enable_filters();
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}
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/*******************************************************************************
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* Initialize the secure environment. At this moment only the TrustZone
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* Controller is initialized.
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******************************************************************************/
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void stm32mp1_arch_security_setup(void)
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{
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early_init_tzc400();
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}
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/*******************************************************************************
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* Initialize the secure environment. At this moment only the TrustZone
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* Controller is initialized.
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******************************************************************************/
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void stm32mp1_security_setup(void)
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{
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init_tzc400();
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}
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