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09d40e0e08
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
124 lines
3.4 KiB
C
124 lines
3.4 KiB
C
/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdbool.h>
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#include <arch.h>
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <drivers/arm/gicv3.h>
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#include <lib/mmio.h>
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#include <lib/psci/psci.h>
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#include <plat_imx8.h>
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#include <sci/sci.h>
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const static int ap_core_index[PLATFORM_CORE_COUNT] = {
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SC_R_A35_0, SC_R_A35_1, SC_R_A35_2, SC_R_A35_3
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};
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int imx_pwr_domain_on(u_register_t mpidr)
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{
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int ret = PSCI_E_SUCCESS;
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unsigned int cpu_id;
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cpu_id = MPIDR_AFFLVL0_VAL(mpidr);
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printf("imx_pwr_domain_on cpu_id %d\n", cpu_id);
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if (sc_pm_set_resource_power_mode(ipc_handle, ap_core_index[cpu_id],
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SC_PM_PW_MODE_ON) != SC_ERR_NONE) {
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ERROR("core %d power on failed!\n", cpu_id);
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ret = PSCI_E_INTERN_FAIL;
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}
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if (sc_pm_cpu_start(ipc_handle, ap_core_index[cpu_id],
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true, BL31_BASE) != SC_ERR_NONE) {
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ERROR("boot core %d failed!\n", cpu_id);
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ret = PSCI_E_INTERN_FAIL;
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}
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return ret;
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}
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void imx_pwr_domain_on_finish(const psci_power_state_t *target_state)
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{
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plat_gic_pcpu_init();
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plat_gic_cpuif_enable();
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}
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int imx_validate_ns_entrypoint(uintptr_t ns_entrypoint)
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{
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return PSCI_E_SUCCESS;
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}
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void imx_pwr_domain_off(const psci_power_state_t *target_state)
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{
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u_register_t mpidr = read_mpidr_el1();
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unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr);
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plat_gic_cpuif_disable();
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sc_pm_req_cpu_low_power_mode(ipc_handle, ap_core_index[cpu_id],
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SC_PM_PW_MODE_OFF, SC_PM_WAKE_SRC_NONE);
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printf("turn off core:%d\n", cpu_id);
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}
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void imx_domain_suspend(const psci_power_state_t *target_state)
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{
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u_register_t mpidr = read_mpidr_el1();
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unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr);
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plat_gic_cpuif_disable();
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sc_pm_set_cpu_resume_addr(ipc_handle, ap_core_index[cpu_id], BL31_BASE);
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sc_pm_req_cpu_low_power_mode(ipc_handle, ap_core_index[cpu_id],
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SC_PM_PW_MODE_OFF, SC_PM_WAKE_SRC_GIC);
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}
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void imx_domain_suspend_finish(const psci_power_state_t *target_state)
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{
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u_register_t mpidr = read_mpidr_el1();
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unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr);
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sc_pm_req_low_power_mode(ipc_handle, ap_core_index[cpu_id],
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SC_PM_PW_MODE_ON);
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plat_gic_cpuif_enable();
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}
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static const plat_psci_ops_t imx_plat_psci_ops = {
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.pwr_domain_on = imx_pwr_domain_on,
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.pwr_domain_on_finish = imx_pwr_domain_on_finish,
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.validate_ns_entrypoint = imx_validate_ns_entrypoint,
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.system_off = imx_system_off,
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.system_reset = imx_system_reset,
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.pwr_domain_off = imx_pwr_domain_off,
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.pwr_domain_suspend = imx_domain_suspend,
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.pwr_domain_suspend_finish = imx_domain_suspend_finish,
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.get_sys_suspend_power_state = imx_get_sys_suspend_power_state,
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.validate_power_state = imx_validate_power_state,
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};
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int plat_setup_psci_ops(uintptr_t sec_entrypoint,
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const plat_psci_ops_t **psci_ops)
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{
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imx_mailbox_init(sec_entrypoint);
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*psci_ops = &imx_plat_psci_ops;
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/* Request low power mode for A35 cluster, only need to do once */
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sc_pm_req_low_power_mode(ipc_handle, SC_R_A35, SC_PM_PW_MODE_OFF);
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/* Request RUN and LP modes for DDR, system interconnect etc. */
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sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35,
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SC_PM_SYS_IF_DDR, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_STBY);
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sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35,
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SC_PM_SYS_IF_MU, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_STBY);
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sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35,
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SC_PM_SYS_IF_INTERCONNECT, SC_PM_PW_MODE_ON,
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SC_PM_PW_MODE_STBY);
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return 0;
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}
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