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09d40e0e08
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
254 lines
6.7 KiB
ArmAsm
254 lines
6.7 KiB
ArmAsm
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm_macros.S>
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#include <assert_macros.S>
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#define USE_FINISH_CONSOLE_REG_2
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#include <console_macros.S>
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#include <drivers/st/stm32_console.h>
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#include <drivers/st/stm32_uart_regs.h>
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#define USART_TIMEOUT 0x1000
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/*
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* "core" functions are low-level implementations that don't require
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* writeable memory and are thus safe to call in BL1 crash context.
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*/
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.globl console_stm32_core_init
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.globl console_stm32_core_putc
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.globl console_stm32_core_getc
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.globl console_stm32_core_flush
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.globl console_stm32_putc
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.globl console_stm32_flush
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/* -----------------------------------------------------------------
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* int console_core_init(uintptr_t base_addr,
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* unsigned int uart_clk,
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* unsigned int baud_rate)
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*
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* Function to initialize the console without a C Runtime to print
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* debug information. This function will be accessed by console_init
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* and crash reporting.
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*
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* In: r0 - console base address
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* r1 - Uart clock in Hz
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* r2 - Baud rate
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* Out: return 1 on success else 0 on error
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* Clobber list : r1, r2, r3
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* -----------------------------------------------------------------
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*/
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func console_stm32_core_init
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/* Check the input base address */
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cmp r0, #0
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beq core_init_fail
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#if defined(IMAGE_BL2)
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/* Check baud rate and uart clock for sanity */
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cmp r1, #0
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beq core_init_fail
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cmp r2, #0
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beq core_init_fail
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/* Disable UART */
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ldr r3, [r0, #USART_CR1]
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bic r3, r3, #USART_CR1_UE
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str r3, [r0, #USART_CR1]
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/* Configure UART */
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orr r3, r3, #(USART_CR1_TE | USART_CR1_FIFOEN)
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str r3, [r0, #USART_CR1]
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ldr r3, [r0, #USART_CR2]
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bic r3, r3, #USART_CR2_STOP
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str r3, [r0, #USART_CR2]
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/* Divisor = (Uart clock + (baudrate / 2)) / baudrate */
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lsl r3, r2, #1
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add r3, r1, r3
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udiv r3, r3, r2
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str r3, [r0, #USART_BRR]
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/* Enable UART */
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ldr r3, [r0, #USART_CR1]
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orr r3, r3, #USART_CR1_UE
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str r3, [r0, #USART_CR1]
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/* Check TEACK bit */
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mov r2, #USART_TIMEOUT
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teack_loop:
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subs r2, r2, #1
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beq core_init_fail
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ldr r3, [r0, #USART_ISR]
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tst r3, #USART_ISR_TEACK
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beq teack_loop
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#endif /* IMAGE_BL2 */
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mov r0, #1
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bx lr
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core_init_fail:
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mov r0, #0
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bx lr
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endfunc console_stm32_core_init
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.globl console_stm32_register
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/* -------------------------------------------------------
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* int console_stm32_register(uintptr_t baseaddr,
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* uint32_t clock, uint32_t baud,
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* struct console_stm32 *console);
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* Function to initialize and register a new STM32
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* console. Storage passed in for the console struct
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* *must* be persistent (i.e. not from the stack).
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* In: r0 - UART register base address
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* r1 - UART clock in Hz
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* r2 - Baud rate
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* r3 - pointer to empty console_stm32 struct
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* Out: return 1 on success, 0 on error
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* Clobber list : r0, r1, r2
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* -------------------------------------------------------
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*/
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func console_stm32_register
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push {r4, lr}
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mov r4, r3
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cmp r4, #0
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beq register_fail
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str r0, [r4, #CONSOLE_T_STM32_BASE]
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bl console_stm32_core_init
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cmp r0, #0
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beq register_fail
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mov r0, r4
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pop {r4, lr}
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finish_console_register stm32 putc=1, getc=0, flush=1
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register_fail:
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pop {r4, pc}
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endfunc console_stm32_register
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/* ---------------------------------------------------------------
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* int console_core_putc(int c, uintptr_t base_addr)
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*
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* Function to output a character over the console. It returns the
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* character printed on success or -1 on error.
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*
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* In : r0 - character to be printed
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* r1 - console base address
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* Out : return -1 on error else return character.
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* Clobber list : r2
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* ---------------------------------------------------------------
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*/
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func console_stm32_core_putc
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/* Check the input parameter */
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cmp r1, #0
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beq putc_error
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/* Prepend '\r' to '\n' */
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cmp r0, #0xA
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bne 2f
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1:
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/* Check Transmit Data Register Empty */
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txe_loop_1:
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ldr r2, [r1, #USART_ISR]
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tst r2, #USART_ISR_TXE
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beq txe_loop_1
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mov r2, #0xD
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str r2, [r1, #USART_TDR]
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/* Check transmit complete flag */
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tc_loop_1:
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ldr r2, [r1, #USART_ISR]
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tst r2, #USART_ISR_TC
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beq tc_loop_1
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2:
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/* Check Transmit Data Register Empty */
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txe_loop_2:
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ldr r2, [r1, #USART_ISR]
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tst r2, #USART_ISR_TXE
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beq txe_loop_2
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str r0, [r1, #USART_TDR]
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/* Check transmit complete flag */
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tc_loop_2:
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ldr r2, [r1, #USART_ISR]
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tst r2, #USART_ISR_TC
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beq tc_loop_2
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bx lr
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putc_error:
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mov r0, #-1
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bx lr
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endfunc console_stm32_core_putc
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/* ------------------------------------------------------------
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* int console_stm32_putc(int c, struct console_stm32 *console)
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* Function to output a character over the console. It
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* returns the character printed on success or -1 on error.
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* In: r0 - character to be printed
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* r1 - pointer to console_t structure
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* Out : return -1 on error else return character.
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* Clobber list: r2
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* ------------------------------------------------------------
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*/
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func console_stm32_putc
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#if ENABLE_ASSERTIONS
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cmp r1, #0
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ASM_ASSERT(ne)
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#endif /* ENABLE_ASSERTIONS */
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ldr r1, [r1, #CONSOLE_T_STM32_BASE]
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b console_stm32_core_putc
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endfunc console_stm32_putc
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/* -----------------------------------------------------------
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* int console_core_getc(uintptr_t base_addr)
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*
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* Function to get a character from the console.
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* It returns the character grabbed on success or -1 on error.
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*
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* In : r0 - console base address
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* Out : return -1.
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* Clobber list : r0, r1
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* -----------------------------------------------------------
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*/
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func console_stm32_core_getc
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/* Not supported */
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mov r0, #-1
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bx lr
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endfunc console_stm32_core_getc
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/* ---------------------------------------------------------------
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* int console_core_flush(uintptr_t base_addr)
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*
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* Function to force a write of all buffered data that hasn't been
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* output.
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*
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* In : r0 - console base address
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* Out : return -1 on error else return 0.
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* Clobber list : r0, r1
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* ---------------------------------------------------------------
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*/
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func console_stm32_core_flush
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cmp r0, #0
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beq flush_error
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/* Check Transmit Data Register Empty */
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txe_loop_3:
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ldr r1, [r0, #USART_ISR]
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tst r1, #USART_ISR_TXE
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beq txe_loop_3
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mov r0, #0
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bx lr
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flush_error:
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mov r0, #-1
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bx lr
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endfunc console_stm32_core_flush
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/* ------------------------------------------------------
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* int console_stm32_flush(struct console_stm32 *console)
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* Function to force a write of all buffered
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* data that hasn't been output.
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* In : r0 - pointer to console_t structure
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* Out : return -1 on error else return 0.
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* Clobber list: r0, r1
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* ------------------------------------------------------
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*/
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func console_stm32_flush
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#if ENABLE_ASSERTIONS
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cmp r0, #0
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ASM_ASSERT(ne)
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#endif /* ENABLE_ASSERTIONS */
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ldr r0, [r0, #CONSOLE_T_STM32_BASE]
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b console_stm32_core_flush
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endfunc console_stm32_flush
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