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09d40e0e08
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
157 lines
4.3 KiB
C
157 lines
4.3 KiB
C
/*
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* Copyright (C) 2018 Marvell International Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* https://spdx.org/licenses
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*/
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/* AXI to M-Bridge decoding unit driver for Marvell Armada 8K and 8K+ SoCs */
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <armada_common.h>
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#include <mvebu.h>
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#include <mvebu_def.h>
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#if LOG_LEVEL >= LOG_LEVEL_INFO
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#define DEBUG_ADDR_MAP
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#endif
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/* common defines */
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#define WIN_ENABLE_BIT (0x1)
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#define MVEBU_AMB_ADEC_OFFSET (0x70ff00)
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#define AMB_WIN_CR_OFFSET(win) (amb_base + 0x0 + (0x8 * win))
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#define AMB_ATTR_OFFSET 8
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#define AMB_ATTR_MASK 0xFF
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#define AMB_SIZE_OFFSET 16
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#define AMB_SIZE_MASK 0xFF
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#define AMB_WIN_BASE_OFFSET(win) (amb_base + 0x4 + (0x8 * win))
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#define AMB_BASE_OFFSET 16
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#define AMB_BASE_ADDR_MASK ((1 << (32 - AMB_BASE_OFFSET)) - 1)
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#define AMB_WIN_ALIGNMENT_64K (0x10000)
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#define AMB_WIN_ALIGNMENT_1M (0x100000)
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uintptr_t amb_base;
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static void amb_check_win(struct addr_map_win *win, uint32_t win_num)
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{
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uint32_t base_addr;
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/* make sure the base address is in 16-bit range */
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if (win->base_addr > AMB_BASE_ADDR_MASK) {
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WARN("Window %d: base address is too big 0x%llx\n",
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win_num, win->base_addr);
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win->base_addr = AMB_BASE_ADDR_MASK;
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WARN("Set the base address to 0x%llx\n", win->base_addr);
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}
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base_addr = win->base_addr << AMB_BASE_OFFSET;
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/* for AMB The base is always 1M aligned */
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/* check if address is aligned to 1M */
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if (IS_NOT_ALIGN(base_addr, AMB_WIN_ALIGNMENT_1M)) {
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win->base_addr = ALIGN_UP(base_addr, AMB_WIN_ALIGNMENT_1M);
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WARN("Window %d: base address unaligned to 0x%x\n",
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win_num, AMB_WIN_ALIGNMENT_1M);
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WARN("Align up the base address to 0x%llx\n", win->base_addr);
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}
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/* size parameter validity check */
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if (!IS_POWER_OF_2(win->win_size)) {
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WARN("Window %d: window size is not power of 2 (0x%llx)\n",
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win_num, win->win_size);
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win->win_size = ROUND_UP_TO_POW_OF_2(win->win_size);
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WARN("Rounding size to 0x%llx\n", win->win_size);
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}
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}
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static void amb_enable_win(struct addr_map_win *win, uint32_t win_num)
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{
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uint32_t ctrl, base, size;
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/*
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* size is 64KB granularity.
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* The number of ones specifies the size of the
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* window in 64 KB granularity. 0 is 64KB
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*/
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size = (win->win_size / AMB_WIN_ALIGNMENT_64K) - 1;
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ctrl = (size << AMB_SIZE_OFFSET) | (win->target_id << AMB_ATTR_OFFSET);
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base = win->base_addr << AMB_BASE_OFFSET;
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mmio_write_32(AMB_WIN_BASE_OFFSET(win_num), base);
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mmio_write_32(AMB_WIN_CR_OFFSET(win_num), ctrl);
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/* enable window after configuring window size (and attributes) */
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ctrl |= WIN_ENABLE_BIT;
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mmio_write_32(AMB_WIN_CR_OFFSET(win_num), ctrl);
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}
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#ifdef DEBUG_ADDR_MAP
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static void dump_amb_adec(void)
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{
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uint32_t ctrl, base, win_id, attr;
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uint32_t size, size_count;
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/* Dump all AMB windows */
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printf("bank attribute base size\n");
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printf("--------------------------------------------\n");
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for (win_id = 0; win_id < AMB_MAX_WIN_ID; win_id++) {
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ctrl = mmio_read_32(AMB_WIN_CR_OFFSET(win_id));
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if (ctrl & WIN_ENABLE_BIT) {
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base = mmio_read_32(AMB_WIN_BASE_OFFSET(win_id));
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attr = (ctrl >> AMB_ATTR_OFFSET) & AMB_ATTR_MASK;
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size_count = (ctrl >> AMB_SIZE_OFFSET) & AMB_SIZE_MASK;
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size = (size_count + 1) * AMB_WIN_ALIGNMENT_64K;
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printf("amb 0x%04x 0x%08x 0x%08x\n",
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attr, base, size);
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}
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}
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}
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#endif
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int init_amb_adec(uintptr_t base)
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{
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struct addr_map_win *win;
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uint32_t win_id, win_reg;
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uint32_t win_count;
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INFO("Initializing AXI to MBus Bridge Address decoding\n");
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/* Get the base address of the AMB address decoding */
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amb_base = base + MVEBU_AMB_ADEC_OFFSET;
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/* Get the array of the windows and its size */
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marvell_get_amb_memory_map(&win, &win_count, base);
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if (win_count <= 0)
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INFO("no windows configurations found\n");
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if (win_count > AMB_MAX_WIN_ID) {
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INFO("number of windows is bigger than %d\n", AMB_MAX_WIN_ID);
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return 0;
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}
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/* disable all AMB windows */
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for (win_id = 0; win_id < AMB_MAX_WIN_ID; win_id++) {
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win_reg = mmio_read_32(AMB_WIN_CR_OFFSET(win_id));
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win_reg &= ~WIN_ENABLE_BIT;
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mmio_write_32(AMB_WIN_CR_OFFSET(win_id), win_reg);
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}
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/* enable relevant windows */
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for (win_id = 0; win_id < win_count; win_id++, win++) {
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amb_check_win(win, win_id);
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amb_enable_win(win, win_id);
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}
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#ifdef DEBUG_ADDR_MAP
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dump_amb_adec();
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#endif
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INFO("Done AXI to MBus Bridge Address decoding Initializing\n");
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return 0;
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}
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