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Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way:e0ea0928d5
("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems:46f9b2c3a2
("drivers: add tzc380 support"). This problem was introduced in commit4ecca33988
("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
287 lines
8.5 KiB
C
287 lines
8.5 KiB
C
/*
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <common/debug.h>
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#include <drivers/arm/tzc_dmc500.h>
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#include <drivers/arm/tzc_common.h>
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#include <lib/mmio.h>
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#include "tzc_common_private.h"
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/*
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* Macros which will be used by common core functions.
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*/
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#define TZC_DMC500_REGION_BASE_LOW_0_OFFSET 0x054
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#define TZC_DMC500_REGION_BASE_HIGH_0_OFFSET 0x058
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#define TZC_DMC500_REGION_TOP_LOW_0_OFFSET 0x05C
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#define TZC_DMC500_REGION_TOP_HIGH_0_OFFSET 0x060
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#define TZC_DMC500_REGION_ATTR_0_OFFSET 0x064
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#define TZC_DMC500_REGION_ID_ACCESS_0_OFFSET 0x068
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#define TZC_DMC500_ACTION_OFF 0x50
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/* Pointer to the tzc_dmc500_driver_data structure populated by the platform */
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static const tzc_dmc500_driver_data_t *g_driver_data;
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static unsigned int g_sys_if_count;
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#define verify_region_attr(region, attr) \
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((g_conf_regions[(region)].sec_attr == \
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((attr) >> TZC_REGION_ATTR_SEC_SHIFT)) \
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&& ((attr) & (0x1 << TZC_REGION_ATTR_F_EN_SHIFT)))
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/*
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* Structure for configured regions attributes in DMC500.
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*/
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typedef struct tzc_dmc500_regions {
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unsigned int sec_attr;
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int is_enabled;
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} tzc_dmc500_regions_t;
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/*
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* Array storing the attributes of the configured regions. This array
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* will be used by the `tzc_dmc500_verify_complete` to verify the flush
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* completion.
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*/
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static tzc_dmc500_regions_t g_conf_regions[MAX_REGION_VAL + 1];
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/* Helper Macros for making the code readable */
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#define DMC_INST_BASE_ADDR(instance) (g_driver_data->dmc_base[instance])
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#define DMC_INST_SI_BASE(instance, interface) \
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(DMC_INST_BASE_ADDR(instance) + IFACE_OFFSET(interface))
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DEFINE_TZC_COMMON_WRITE_ACTION(_dmc500, DMC500)
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DEFINE_TZC_COMMON_WRITE_REGION_BASE(_dmc500, DMC500)
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DEFINE_TZC_COMMON_WRITE_REGION_TOP(_dmc500, DMC500)
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DEFINE_TZC_COMMON_WRITE_REGION_ATTRIBUTES(_dmc500, DMC500)
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DEFINE_TZC_COMMON_WRITE_REGION_ID_ACCESS(_dmc500, DMC500)
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DEFINE_TZC_COMMON_CONFIGURE_REGION0(_dmc500)
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DEFINE_TZC_COMMON_CONFIGURE_REGION(_dmc500)
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static inline unsigned int _tzc_dmc500_read_region_attr_0(
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uintptr_t dmc_si_base,
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unsigned int region_no)
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{
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return mmio_read_32(dmc_si_base +
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TZC_REGION_OFFSET(TZC_DMC500_REGION_SIZE, region_no) +
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TZC_DMC500_REGION_ATTR_0_OFFSET);
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}
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static inline void _tzc_dmc500_write_flush_control(uintptr_t dmc_si_base)
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{
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mmio_write_32(dmc_si_base + SI_FLUSH_CTRL_OFFSET, 1);
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}
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/*
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* Sets the Flush controls for all the DMC Instances and System Interfaces.
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* This initiates the flush of configuration settings from the shadow
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* registers to the actual configuration register. The caller should poll
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* changed register to confirm update.
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*/
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void tzc_dmc500_config_complete(void)
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{
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int dmc_inst, sys_if;
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assert(g_driver_data);
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for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
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assert(DMC_INST_BASE_ADDR(dmc_inst));
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for (sys_if = 0; sys_if < g_sys_if_count; sys_if++)
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_tzc_dmc500_write_flush_control(
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DMC_INST_SI_BASE(dmc_inst, sys_if));
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}
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}
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/*
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* This function reads back the secure attributes from the configuration
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* register for each DMC Instance and System Interface and compares it with
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* the configured value. The successful verification of the region attributes
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* confirms that the flush operation has completed.
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* If the verification fails, the caller is expected to invoke this API again
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* till it succeeds.
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* Returns 0 on success and 1 on failure.
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*/
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int tzc_dmc500_verify_complete(void)
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{
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int dmc_inst, sys_if, region_no;
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unsigned int attr;
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assert(g_driver_data);
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/* Region 0 must be configured */
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assert(g_conf_regions[0].is_enabled);
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/* Iterate over all configured regions */
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for (region_no = 0; region_no <= MAX_REGION_VAL; region_no++) {
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if (!g_conf_regions[region_no].is_enabled)
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continue;
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for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count;
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dmc_inst++) {
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assert(DMC_INST_BASE_ADDR(dmc_inst));
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for (sys_if = 0; sys_if < g_sys_if_count;
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sys_if++) {
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attr = _tzc_dmc500_read_region_attr_0(
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DMC_INST_SI_BASE(dmc_inst, sys_if),
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region_no);
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VERBOSE("Verifying DMC500 region:%d"
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" dmc_inst:%d sys_if:%d attr:%x\n",
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region_no, dmc_inst, sys_if, attr);
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if (!verify_region_attr(region_no, attr))
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return 1;
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}
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}
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}
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return 0;
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}
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/*
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* `tzc_dmc500_configure_region0` is used to program region 0 in both the
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* system interfaces of all the DMC-500 instances. Region 0 covers the whole
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* address space that is not mapped to any other region for a system interface,
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* and is always enabled; this cannot be changed. This function only changes
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* the access permissions.
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*/
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void tzc_dmc500_configure_region0(unsigned int sec_attr,
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unsigned int nsaid_permissions)
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{
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int dmc_inst, sys_if;
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/* Assert if DMC-500 is not initialized */
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assert(g_driver_data);
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/* Configure region_0 in all DMC instances */
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for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
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assert(DMC_INST_BASE_ADDR(dmc_inst));
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for (sys_if = 0; sys_if < g_sys_if_count; sys_if++)
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_tzc_dmc500_configure_region0(
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DMC_INST_SI_BASE(dmc_inst, sys_if),
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sec_attr, nsaid_permissions);
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}
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g_conf_regions[0].sec_attr = sec_attr;
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g_conf_regions[0].is_enabled = 1;
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}
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/*
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* `tzc_dmc500_configure_region` is used to program a region into all system
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* interfaces of all the DMC instances.
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* NOTE:
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* Region 0 is special; it is preferable to use tzc_dmc500_configure_region0
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* for this region (see comment for that function).
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*/
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void tzc_dmc500_configure_region(unsigned int region_no,
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unsigned long long region_base,
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unsigned long long region_top,
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unsigned int sec_attr,
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unsigned int nsaid_permissions)
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{
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int dmc_inst, sys_if;
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assert(g_driver_data);
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/* Do range checks on regions. */
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assert((region_no >= 0U) && (region_no <= MAX_REGION_VAL));
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/*
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* Do address range check based on DMC-TZ configuration. A 43bit address
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* is the max and expected case.
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*/
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assert(((region_top <= (UINT64_MAX >> (64U - 43U))) &&
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(region_base < region_top)));
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/* region_base and (region_top + 1) must be 4KB aligned */
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assert(((region_base | (region_top + 1U)) & (4096U - 1U)) == 0U);
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for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
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assert(DMC_INST_BASE_ADDR(dmc_inst));
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for (sys_if = 0; sys_if < g_sys_if_count; sys_if++)
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_tzc_dmc500_configure_region(
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DMC_INST_SI_BASE(dmc_inst, sys_if),
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TZC_DMC500_REGION_ATTR_F_EN_MASK,
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region_no, region_base, region_top,
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sec_attr, nsaid_permissions);
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}
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g_conf_regions[region_no].sec_attr = sec_attr;
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g_conf_regions[region_no].is_enabled = 1;
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}
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/* Sets the action value for all the DMC instances */
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void tzc_dmc500_set_action(unsigned int action)
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{
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int dmc_inst;
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assert(g_driver_data);
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for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
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assert(DMC_INST_BASE_ADDR(dmc_inst));
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/*
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* - Currently no handler is provided to trap an error via
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* interrupt or exception.
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* - The interrupt action has not been tested.
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*/
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_tzc_dmc500_write_action(DMC_INST_BASE_ADDR(dmc_inst), action);
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}
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}
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/*
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* A DMC-500 instance must be present at each base address provided by the
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* platform. It also expects platform to pass at least one instance of
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* DMC-500.
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*/
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static void validate_plat_driver_data(
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const tzc_dmc500_driver_data_t *plat_driver_data)
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{
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#if ENABLE_ASSERTIONS
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int i;
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unsigned int dmc_id;
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uintptr_t dmc_base;
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assert(plat_driver_data);
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assert(plat_driver_data->dmc_count > 0 &&
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(plat_driver_data->dmc_count <= MAX_DMC_COUNT));
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for (i = 0; i < plat_driver_data->dmc_count; i++) {
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dmc_base = plat_driver_data->dmc_base[i];
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assert(dmc_base);
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dmc_id = _tzc_read_peripheral_id(dmc_base);
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assert(dmc_id == DMC500_PERIPHERAL_ID);
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}
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#endif /* ENABLE_ASSERTIONS */
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}
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/*
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* Initializes the base address and count of DMC instances.
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*
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* Note : Only pointer to plat_driver_data is saved, so it is caller's
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* responsibility to keep it valid until the driver is used.
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*/
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void tzc_dmc500_driver_init(const tzc_dmc500_driver_data_t *plat_driver_data)
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{
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/* Check valid pointer is passed */
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assert(plat_driver_data);
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/*
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* NOTE: This driver expects the DMC-500 controller is already in
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* READY state. Hence, it uses the reconfiguration method for
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* programming TrustZone regions
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*/
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/* Validates the information passed by platform */
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validate_plat_driver_data(plat_driver_data);
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g_driver_data = plat_driver_data;
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/* Check valid system interface count */
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assert(g_driver_data->sys_if_count <= MAX_SYS_IF_COUNT);
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g_sys_if_count = g_driver_data->sys_if_count;
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/* If interface count is not present then assume max */
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if (g_sys_if_count == 0U)
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g_sys_if_count = MAX_SYS_IF_COUNT;
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}
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