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Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way:e0ea0928d5
("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems:46f9b2c3a2
("drivers: add tzc380 support"). This problem was introduced in commit4ecca33988
("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
127 lines
2.9 KiB
C
127 lines
2.9 KiB
C
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Driver for GIC600-specific features. This driver only overrides APIs that are
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* different to those generic ones in GICv3 driver.
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*
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* GIC600 supports independently power-gating redistributor interface.
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*/
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#include <assert.h>
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#include <arch_helpers.h>
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#include <drivers/arm/gicv3.h>
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#include "gicv3_private.h"
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/* GIC600-specific register offsets */
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#define GICR_PWRR 0x24
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/* GICR_PWRR fields */
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#define PWRR_RDPD_SHIFT 0
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#define PWRR_RDGPD_SHIFT 2
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#define PWRR_RDGPO_SHIFT 3
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#define PWRR_RDGPD (1 << PWRR_RDGPD_SHIFT)
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#define PWRR_RDGPO (1 << PWRR_RDGPO_SHIFT)
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/* Values to write to GICR_PWRR register to power redistributor */
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#define PWRR_ON (0 << PWRR_RDPD_SHIFT)
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#define PWRR_OFF (1 << PWRR_RDPD_SHIFT)
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/* GIC600-specific accessor functions */
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static void gicr_write_pwrr(uintptr_t base, unsigned int val)
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{
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mmio_write_32(base + GICR_PWRR, val);
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}
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static uint32_t gicr_read_pwrr(uintptr_t base)
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{
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return mmio_read_32(base + GICR_PWRR);
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}
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static int gicr_group_powering_down(uint32_t pwrr)
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{
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/*
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* Whether the redistributor group power down operation is in transit:
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* i.e. it's intending to, but not finished yet.
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*/
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return ((pwrr & PWRR_RDGPD) && !(pwrr & PWRR_RDGPO));
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}
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static void gic600_pwr_on(uintptr_t base)
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{
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/* Power on redistributor */
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gicr_write_pwrr(base, PWRR_ON);
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/* Wait until the power on state is reflected */
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while (gicr_read_pwrr(base) & PWRR_RDGPO)
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;
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}
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static void gic600_pwr_off(uintptr_t base)
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{
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/* Power off redistributor */
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gicr_write_pwrr(base, PWRR_OFF);
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/*
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* If this is the last man, turning this redistributor frame off will
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* result in the group itself being powered off. In that case, wait as
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* long as it's in transition, or has aborted the transition altogether
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* for any reason.
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*/
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if (gicr_read_pwrr(base) & PWRR_RDGPD) {
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while (gicr_group_powering_down(gicr_read_pwrr(base)))
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;
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}
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}
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void gicv3_distif_pre_save(unsigned int proc_num)
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{
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arm_gicv3_distif_pre_save(proc_num);
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}
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void gicv3_distif_post_restore(unsigned int proc_num)
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{
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arm_gicv3_distif_post_restore(proc_num);
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}
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/*
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* Power off GIC600 redistributor
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*/
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void gicv3_rdistif_off(unsigned int proc_num)
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{
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uintptr_t gicr_base;
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assert(gicv3_driver_data);
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assert(proc_num < gicv3_driver_data->rdistif_num);
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assert(gicv3_driver_data->rdistif_base_addrs);
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gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
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assert(gicr_base);
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/* Attempt to power redistributor off */
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gic600_pwr_off(gicr_base);
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}
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/*
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* Power on GIC600 redistributor
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*/
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void gicv3_rdistif_on(unsigned int proc_num)
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{
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uintptr_t gicr_base;
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assert(gicv3_driver_data);
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assert(proc_num < gicv3_driver_data->rdistif_num);
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assert(gicv3_driver_data->rdistif_base_addrs);
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gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num];
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assert(gicr_base);
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/* Power redistributor on */
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gic600_pwr_on(gicr_base);
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}
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