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Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way:e0ea0928d5
("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems:46f9b2c3a2
("drivers: add tzc380 support"). This problem was introduced in commit4ecca33988
("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
101 lines
2.8 KiB
C
101 lines
2.8 KiB
C
/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <arch_helpers.h>
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#include <context.h>
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#include <common/debug.h>
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#include <lib/el3_runtime/context_mgmt.h>
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#include <plat/common/platform.h>
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#include "../bl1_private.h"
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/*
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* Following array will be used for context management.
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* There are 2 instances, for the Secure and Non-Secure contexts.
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*/
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static cpu_context_t bl1_cpu_context[2];
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/* Following contains the cpu context pointers. */
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static void *bl1_cpu_context_ptr[2];
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void *cm_get_context(uint32_t security_state)
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{
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assert(sec_state_is_valid(security_state));
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return bl1_cpu_context_ptr[security_state];
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}
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void cm_set_context(void *context, uint32_t security_state)
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{
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assert(sec_state_is_valid(security_state));
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bl1_cpu_context_ptr[security_state] = context;
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}
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/*******************************************************************************
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* This function prepares the context for Secure/Normal world images.
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* Normal world images are transitioned to EL2(if supported) else EL1.
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******************************************************************************/
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void bl1_prepare_next_image(unsigned int image_id)
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{
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unsigned int security_state;
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image_desc_t *image_desc;
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entry_point_info_t *next_bl_ep;
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#if CTX_INCLUDE_AARCH32_REGS
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/*
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* Ensure that the build flag to save AArch32 system registers in CPU
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* context is not set for AArch64-only platforms.
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*/
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if (el_implemented(1) == EL_IMPL_A64ONLY) {
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ERROR("EL1 supports AArch64-only. Please set build flag "
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"CTX_INCLUDE_AARCH32_REGS = 0\n");
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panic();
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}
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#endif
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/* Get the image descriptor. */
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image_desc = bl1_plat_get_image_desc(image_id);
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assert(image_desc);
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/* Get the entry point info. */
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next_bl_ep = &image_desc->ep_info;
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/* Get the image security state. */
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security_state = GET_SECURITY_STATE(next_bl_ep->h.attr);
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/* Setup the Secure/Non-Secure context if not done already. */
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if (!cm_get_context(security_state))
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cm_set_context(&bl1_cpu_context[security_state], security_state);
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/* Prepare the SPSR for the next BL image. */
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if (security_state == SECURE) {
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next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
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DISABLE_ALL_EXCEPTIONS);
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} else {
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/* Use EL2 if supported; else use EL1. */
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if (el_implemented(2) != EL_IMPL_NONE) {
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next_bl_ep->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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DISABLE_ALL_EXCEPTIONS);
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} else {
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next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
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DISABLE_ALL_EXCEPTIONS);
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}
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}
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/* Allow platform to make change */
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bl1_plat_set_ep_info(image_id, next_bl_ep);
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/* Prepare the context for the next BL image. */
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cm_init_my_context(next_bl_ep);
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cm_prepare_el3_exit(security_state);
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/* Indicate that image is in execution state. */
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image_desc->state = IMAGE_STATE_EXECUTED;
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print_entry_point_info(next_bl_ep);
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}
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