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06cec933de
The commit
1922875233 ("fix(spm-mm): carve out NS buffer TZC400 region")
removes overlaps of ns shared buffer in secure memory region.
Unfortunately, this separation increases 1 region and over maximum
number of TZC programmable regions when they include
extended memory map regions (DRAM3 to DRAM6).
This causes boot failure of StandaloneMm with spmc_el3 && sp_el0 with
ASSERT: drivers/arm/tzc/tzc400.c:256.
To fix this, like SPM_MM, exclude setting extended memory map regions when
it uses SPMC_AT_EL3 && SPC_AT_EL3_SEL0_SP.
Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Change-Id: I2d40bea066ca030050dfe951218cd17171010676
42 lines
1.3 KiB
C
42 lines
1.3 KiB
C
/*
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* Copyright (c) 2014-2022, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat/arm/common/arm_config.h>
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#include <plat/arm/common/plat_arm.h>
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#include <platform_def.h>
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/*
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* We assume that all security programming is done by the primary core.
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*/
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void plat_arm_security_setup(void)
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{
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/*
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* The Base FVP has a TrustZone address space controller, the Foundation
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* FVP does not. Trying to program the device on the foundation FVP will
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* cause an abort.
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*
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* If the platform had additional peripheral specific security
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* configurations, those would be configured here.
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*/
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const arm_tzc_regions_info_t fvp_tzc_regions[] = {
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ARM_TZC_REGIONS_DEF,
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#if !SPM_MM && !ENABLE_RME && !(SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP)
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{FVP_DRAM3_BASE, FVP_DRAM3_END,
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ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS},
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{FVP_DRAM4_BASE, FVP_DRAM4_END,
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ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS},
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{FVP_DRAM5_BASE, FVP_DRAM5_END,
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ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS},
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{FVP_DRAM6_BASE, FVP_DRAM6_END,
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ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS},
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#endif
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{0}
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};
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if ((get_arm_config()->flags & ARM_CONFIG_HAS_TZC) != 0U)
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arm_tzc400_setup(PLAT_ARM_TZC_BASE, fvp_tzc_regions);
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}
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