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https://github.com/ARM-software/arm-trusted-firmware.git
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036935a814
rk3576 is an Octa-core soc with Cortex-a53/a72 inside. This patch supports the following functions: 1. basic platform setup 2. power up/off cpus 3. suspend/resume cpus 4. suspend/resume system 5. reset system 6. power off system Change-Id: I67a019822bd4af13e4a3cdd09cf06202f4922cc4 Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
44 lines
1 KiB
C
44 lines
1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* Copyright (c) 2025, Rockchip Electronics Co., Ltd.
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*/
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#ifndef __PLAT_ROCKCHIP_DMC_RK3576_H__
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#define __PLAT_ROCKCHIP_DMC_RK3576_H__
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#define MAX_CH_NUM (2)
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#define CTL_PORT_NUM (5)
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/* DDR_GRF Register */
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#define GRF_CH_CON(ch, n) ((((ch) % 2) * 0x100) + ((n) * 4))
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#define DDR_GRF_CH_STATUS16(ch) (0x220 + ((ch) * 0x100))
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#define GRF_DDRPHY_CON(n) (0x530 + ((n) * 4))
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#define GRF_DDRPHY_CON0(ch) (0x530 + (((ch) % 2) * 0x4))
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#define DDR_GRF_COMMON_CON(n) (0x540 + ((n) * 4))
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/* PMUGRF Register */
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#define PMUGRF_OS_REG(n) (0x200 + ((n) * 4))
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struct low_power_st {
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uint32_t pwrctl;
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uint32_t clkgatectl;
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uint32_t dfi_lp_mode_apb;
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uint32_t grf_ddr_con0;
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uint32_t grf_ddr_con1;
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uint32_t grf_ddr_con6;
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uint32_t grf_ddr_con7;
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uint32_t grf_ddr_con9;
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uint32_t grf_ddrphy_con0;
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uint32_t hwlp_0;
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uint32_t hwlp_c;
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uint32_t pcl_pd;
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};
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struct rk3576_dmc_config {
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struct low_power_st low_power[MAX_CH_NUM];
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};
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void dmc_save(void);
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void dmc_restore(void);
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#endif /* __PLAT_ROCKCHIP_DMC_RK3576_H__ */
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