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09d40e0e08
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
155 lines
3.7 KiB
C
155 lines
3.7 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include <arch.h>
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#include <lib/mmio.h>
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#include <imx_regs.h>
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#include <imx_clock.h>
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void imx_clock_target_set(unsigned int id, uint32_t val)
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{
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struct ccm *ccm = ((struct ccm *)CCM_BASE);
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uintptr_t addr;
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if (id > CCM_ROOT_CTRL_NUM)
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return;
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addr = (uintptr_t)&ccm->ccm_root_ctrl[id].ccm_target_root;
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mmio_write_32(addr, val);
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}
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void imx_clock_target_clr(unsigned int id, uint32_t val)
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{
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struct ccm *ccm = ((struct ccm *)CCM_BASE);
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uintptr_t addr;
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if (id > CCM_ROOT_CTRL_NUM)
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return;
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addr = (uintptr_t)&ccm->ccm_root_ctrl[id].ccm_target_root_clr;
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mmio_write_32(addr, val);
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}
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void imx_clock_gate_enable(unsigned int id, bool enable)
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{
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struct ccm *ccm = ((struct ccm *)CCM_BASE);
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uintptr_t addr;
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if (id > CCM_CLK_GATE_CTRL_NUM)
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return;
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/* TODO: add support for more than DOMAIN0 clocks */
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if (enable)
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addr = (uintptr_t)&ccm->ccm_clk_gate_ctrl[id].ccm_ccgr_set;
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else
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addr = (uintptr_t)&ccm->ccm_clk_gate_ctrl[id].ccm_ccgr_clr;
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mmio_write_32(addr, CCM_CCGR_SETTING0_DOM_CLK_ALWAYS);
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}
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void imx_clock_enable_uart(unsigned int uart_id, uint32_t uart_clk_en_bits)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_UART1_CLK_ROOT + uart_id;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_UART1 + uart_id;
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/* Check for error */
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if (uart_id > MXC_MAX_UART_NUM)
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return;
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/* Set target register values */
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imx_clock_target_set(ccm_trgt_id, uart_clk_en_bits);
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/* Enable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, true);
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}
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void imx_clock_disable_uart(unsigned int uart_id)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_UART1_CLK_ROOT + uart_id;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_UART1 + uart_id;
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/* Check for error */
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if (uart_id > MXC_MAX_UART_NUM)
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return;
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/* Disable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, false);
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/* Clear the target */
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imx_clock_target_clr(ccm_trgt_id, 0xFFFFFFFF);
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}
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void imx_clock_enable_usdhc(unsigned int usdhc_id, uint32_t usdhc_clk_en_bits)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_USDHC1_CLK_ROOT + usdhc_id;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_USBHDC1 + usdhc_id;
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/* Check for error */
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if (usdhc_id > MXC_MAX_USDHC_NUM)
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return;
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/* Set target register values */
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imx_clock_target_set(ccm_trgt_id, usdhc_clk_en_bits);
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/* Enable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, true);
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}
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void imx_clock_enable_wdog(unsigned int wdog_id)
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{
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_WDOG1 + wdog_id;
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/* Check for error */
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if (wdog_id > MXC_MAX_WDOG_NUM)
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return;
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/* Enable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, true);
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}
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void imx_clock_disable_wdog(unsigned int wdog_id)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_WDOG_CLK_ROOT;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_WDOG1 + wdog_id;
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/* Check for error */
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if (wdog_id > MXC_MAX_WDOG_NUM)
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return;
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/* Disable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, false);
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/* Clear the target */
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imx_clock_target_clr(ccm_trgt_id, 0xFFFFFFFF);
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}
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void imx_clock_set_wdog_clk_root_bits(uint32_t wdog_clk_root_en_bits)
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{
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/* Enable the common clock root just once */
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imx_clock_target_set(CCM_TRT_ID_WDOG_CLK_ROOT, wdog_clk_root_en_bits);
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}
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void imx_clock_enable_usb(unsigned int ccm_ccgr_usb_id)
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{
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/* Enable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_usb_id, true);
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}
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void imx_clock_disable_usb(unsigned int ccm_ccgr_usb_id)
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{
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/* Disable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_usb_id, false);
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}
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void imx_clock_set_usb_clk_root_bits(uint32_t usb_clk_root_en_bits)
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{
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/* Enable the common clock root just once */
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imx_clock_target_set(CCM_TRT_ID_USB_HSIC_CLK_ROOT, usb_clk_root_en_bits);
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}
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