Commit graph

11666 commits

Author SHA1 Message Date
Javier Almansa Sobrino
dc0ca64e4b fix(rmmd): add missing padding to RMM Boot Manifest and initialize it
This patch also:
     * Enforces the check of RES0 fields on EL3-RMM boot interface
       and manifest
     * Fixes a couple of nits on the EL3-RMM Boot Interface
       documentation.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: Idb9e38f9fcda2ba0655646a1e2c4fdbabd5cdc40
2022-12-07 18:54:28 +00:00
Joanna Farley
10f4d1a2d0 Merge "fix(zynqmp): initialize uint32 with value 0U in pm code" into integration 2022-12-01 18:50:50 +01:00
Manish Pandey
5d2edf60c3 Merge "fix(el3_runtime): restore SPSR/ELR/SCR after esb" into integration 2022-12-01 16:31:19 +01:00
Naman Patel
e65584a017 fix(zynqmp): initialize uint32 with value 0U in pm code
MISRA Violation: MISRA C-2012 Rule 7.2
- Initialize the unsigned int with value 0u in pm_service component.

Current misra warning detection tool is not reporting this as
warning. It reports only when the initialized value exceeds the
range of data type based on compiler used.

But, this change is added as a part of precaution as some other
misra checker tool may report it as violation of rule 7.2.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I50a5cee2a077fe157e79757d959ce33064225af3
2022-12-01 03:11:04 -08:00
Manish Pandey
2b9c8b877c Merge "build: restrict usage of CTX_INCLUDE_EL2_REGS" into integration 2022-12-01 11:08:07 +01:00
Govindraj Raja
f1910cc178 build: restrict usage of CTX_INCLUDE_EL2_REGS
CTX_INCLUDE_EL2_REGS is used to save/restore EL2 registers and
it should be only used when there is SPMD or RME enabled.

Make CTX_INCLUDE_EL2_REGS an internal macro and remove
from documentation.

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: I6a70edfd88163423ff0482de094601cf794246d6
2022-12-01 12:04:40 +02:00
Manish Pandey
ff1d2ef387 fix(el3_runtime): restore SPSR/ELR/SCR after esb
SCR_EL3 register is restored before esb issued and it is assumed
that EAs are unmasked at that point, which is wrong, as the SCR_EL3
value at that time is restored from the context of the world where
it is returning to.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Id1c7150a70b5f589b0dc7c50c359b4d23ee9f256
2022-12-01 10:26:42 +01:00
Manish Pandey
caaca4a104 Merge changes from topic "mb/refactor-evlog" into integration
* changes:
  refactor(qemu): pass platform metadata as a function's argument
  refactor(imx8m): pass platform metadata as a function's argument
  refactor(fvp): pass platform metadata as a function's argument
  refactor(measured-boot): accept metadata as a function's argument
2022-11-30 14:17:08 +01:00
Manish Pandey
c6432394a9 Merge "fix(console): fix crash on spin_unlock with cache disabled" into integration 2022-11-29 10:32:46 +01:00
Baruch Siach
5fb6946ad7 fix(console): fix crash on spin_unlock with cache disabled
Current code skips load of spinlock address when cache is disabled. The
following call to spin_unlock stores into the random location that x0
points to.

Move spinlock address load earlier so that x0 is always valid on
spin_unlock call.

Change-Id: Iac640289725dce2518f2fed483d7d36ca748ffe8
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2022-11-29 03:35:23 +01:00
Lauren Wehrmeister
d3d2a5a484 Merge "fix(cpus): workaround for Cortex-X3 erratum 2615812" into integration 2022-11-28 18:15:06 +01:00
Sandrine Bailleux
bf09c416ab Merge "fix(intel): fix print out ERROR when encounter SEU_Err" into integration 2022-11-28 15:08:25 +01:00
Sandrine Bailleux
086d981657 Merge changes I8667f362,Ia0bd832c into integration
* changes:
  feat(intel): setup FPGA interface for Agilex
  fix(intel): fix pinmux handoff bug on Agilex
2022-11-28 15:07:11 +01:00
Sandrine Bailleux
c00b06a41b Merge "fix(intel): fix sp_timer0 is not disabled in firewall on Agilex" into integration 2022-11-28 15:03:16 +01:00
Sandrine Bailleux
f6620acd05 Merge "fix(intel): remove checking on TEMP and VOLT checking for HWMON" into integration 2022-11-28 15:02:41 +01:00
Sandrine Bailleux
27c07d0a00 Merge "fix(rss): remove null-terminator from RSS metadata" into integration 2022-11-28 12:46:56 +01:00
David Vincze
85a14bc0a9 fix(rss): remove null-terminator from RSS metadata
Remove the null-terminator of the string-like data items
from the RSS measurement's metadata. The 'version' and
'sw_type' items have an associated length value which
should not include a null-terminator when storing the
measurement.

Change-Id: Ia91ace2fff8b6f75686dd2e1862475268300bbdb
Signed-off-by: David Vincze <david.vincze@arm.com>
2022-11-25 18:31:14 +01:00
Joanna Farley
4ccbdd86bc Merge "fix(zynqmp): check return status of pm_get_api_version" into integration 2022-11-25 16:25:53 +01:00
Joanna Farley
896c0daf3e Merge "fix(versal): initialize the variable with value 0 in pm code" into integration 2022-11-25 16:24:53 +01:00
Naman Patel
c92ad369ca fix(zynqmp): check return status of pm_get_api_version
MISRA Violation: MISRA C-2012 Rule 17.7
- Check the return status of function pm_get_api_version
and return error in case of failure.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I69fb000c04f22996da7965a09a1797c7bfaad252
2022-11-24 05:30:23 -08:00
Naman Patel
cd73d62b0e fix(versal): initialize the variable with value 0 in pm code
Remove zeromem function as the array is already initialized
with value 0.

MISRA Violation: MISRA C-2012 Rule 9.1
- Initialize the array/variable with a value 0 to resolve
the misra warnings in pm_service component.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I1a3d44a7ae4088a3034eb0119d82b99cd4617ccd
2022-11-24 05:25:48 -08:00
Manish Pandey
53f63eb0ff Merge "feat(qemu): increase size of bl2" into integration 2022-11-24 11:41:08 +01:00
Joanna Farley
0125e86b3b Merge "fix(docs): deprecate plat_convert_pk() in v2.9" into integration 2022-11-22 17:07:05 +01:00
Jit Loon Lim
68ac5fe14c fix(intel): remove checking on TEMP and VOLT checking for HWMON
Remove high level logic hardware channel checking on HWMON
TEMP and VOLT read.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I9102b7b4334cb95f0b622c498a6569328f534d42
2022-11-22 23:56:06 +08:00
Jit Loon Lim
8de7167eb6 fix(intel): fix sp_timer0 is not disabled in firewall on Agilex
sp_timer0 is not disabled in firewall on Agilex causing Zephyr is facing
issue to access the timer.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I0099e200d6c9ca435f46393c6ed9cbe387870af0
2022-11-22 23:55:02 +08:00
Jit Loon Lim
3905f57134 feat(intel): setup FPGA interface for Agilex
Enable/Disable FPGA interfaces based on handoff configuration.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I8667f362aa53e7c68723e0dbd5284844ae39dfb5
2022-11-22 23:35:36 +08:00
Jit Loon Lim
e6c0389091 fix(intel): fix pinmux handoff bug on Agilex
Incorrect number of FPGA pinmux registers was copied from handoff data.
This caused pinmux_emac0_usefpga register to always be zero meaning
"EMAC0 uses HPS IO Pins" even if handoff data for this register was one
meaning "EMAC0 uses the FPGA Inteface".

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Ia0bd832c61d25f66ef13f39fe28b054cb96af9a1
2022-11-22 23:35:22 +08:00
Sieu Mun Tang
1a0bf6e1d8 fix(intel): fix print out ERROR when encounter SEU_Err
Print out ERROR message when system face encounter SEU_ERR

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I744afbca23b74b164e47472039b5d6fbe5c3c764
2022-11-22 23:22:45 +08:00
Yann Gautier
e0f58c7fb6 fix(docs): deprecate plat_convert_pk() in v2.9
The deprecation was tagged "Next release after 2.8". Now there is a 2.9
planned, directly use this version.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I0727eebc4a3800dafafc4166b0c2c40a12c90b4b
2022-11-22 15:15:46 +01:00
Manish V Badarkhe
abef3fe55c refactor(qemu): pass platform metadata as a function's argument
Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as an
argument.

Change-Id: I9d8316914c046f47cdc6875b16649479e82087aa
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-11-22 13:20:44 +00:00
Manish V Badarkhe
de10522af7 refactor(imx8m): pass platform metadata as a function's argument
Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as an
argument.

Change-Id: I4b98b6a035abb28c000344f2dbeb3996c69eee61
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-11-22 10:06:56 +00:00
Manish V Badarkhe
7f3d9eae9f refactor(fvp): pass platform metadata as a function's argument
Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as an
argument.

Change-Id: Id1bf59c243c483d7e32152f094c693e95d29fe2b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-11-22 10:06:56 +00:00
Manish V Badarkhe
5f32444443 refactor(measured-boot): accept metadata as a function's argument
Updated the event log driver's function to accept metadata as an
argument, to remove the platform function usage from the event log
driver to make it a standalone driver.

Change-Id: I512cf693d51dc3c0b9d2c1bfde4f89414e273049
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-11-22 10:06:56 +00:00
Manish Pandey
9881bb93a3 Merge "docs(spm): update threat model" into integration 2022-11-21 19:12:00 +01:00
Manish Pandey
9aef90cc7d Merge "docs(qemu): document steps to run in OpenCI" into integration 2022-11-21 18:55:23 +01:00
Madhukar Pappireddy
31b5b36c52 docs(spm): update threat model
Update SPM threat model for possible threats, from malicious
endpoints, related to interrupt management. The mitigations
are based on the guidance provided in FF-A v1.1 EAC0 spec.

Change-Id: Ib9e26e3f1c60fe3a2734a67de1dcf1cea4883d38
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2022-11-21 10:53:48 -06:00
Harrison Mutai
a5667be075 docs(qemu): document steps to run in OpenCI
Add details on how to run QEMU in OpenCI, and what tests are currently
supported.

Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Change-Id: I291e4eb64a58c766519ff7dcac4841ae75c3934e
2022-11-21 16:45:24 +00:00
Sandrine Bailleux
ca3f25dcc4 Merge "fix(intel): fix UART baud rate and clock" into integration 2022-11-21 14:57:10 +01:00
Sieu Mun Tang
8e53b2fa2e fix(intel): fix UART baud rate and clock
Revise the UART baud rate and clock for general platform build,
SIMIC build and EMU build.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I62fefe7b96d5124e75d2810b4fbc1640422b1353
2022-11-21 13:50:10 +01:00
Manish Pandey
8613c15754 Merge "docs(changelog): changelog for v2.8 release" into integration 2022-11-18 18:28:52 +01:00
Joanna Farley
f69b20dc5f Merge "fix(docs): add v2.9 release schedule" into integration 2022-11-18 17:47:14 +01:00
Joanna Farley
a846d33abc fix(docs): add v2.9 release schedule
Signed-off-by: Joanna Farley <Joanna.Farley@arm.com>
Change-Id: I082461d7d21f63e3b8cbee37e8f01b8128e4b5a0
2022-11-18 10:22:01 +02:00
Olivier Deprez
02fd5a1763 Merge changes I97687f18,I91d5718b into integration
* changes:
  docs(spm): interrupt handling guidance FF-A v1.1 EAC0
  docs(spm): partition runtime model and schedule modes
2022-11-17 11:14:05 +01:00
Harrison Mutai
c7e698cfde fix(cpus): workaround for Cortex-X3 erratum 2615812
Cortex-X3 erratum 2615812 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r1p1, and is still open. The workaround is to disable
the use of the Full Retention power mode in the core (setting
WFI_RET_CTRL and WFE_RET_CTRL in CORTEX_X3_IMP_CPUPWRCTLR_EL1 to 0b000).

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2055130/latest

Change-Id: I5ad66df3e18fc85a6b23f6662239494ee001d82f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2022-11-17 09:41:40 +00:00
Olivier Deprez
8fca0cdbee Merge changes from topic "ja/spm_doc" into integration
* changes:
  docs(spm): ff-a v1.1 indirect message
  docs(spm): s-el0 partition support update
2022-11-17 10:04:49 +01:00
Leo Yan
db2bf3ac19 feat(qemu): increase size of bl2
Increases BL2 size to have room to enable security features (like
measurement and TPM).

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Change-Id: Iba5e8923e2e154315499e9bfce2e0aff0ccc8f95
2022-11-17 16:13:03 +08:00
Madhukar Pappireddy
06afdd1e7a docs(spm): interrupt handling guidance FF-A v1.1 EAC0
This patch documents the actions taken by Hafnium SPMC in response
to non-secure and secure interrupts.

Change-Id: I97687f188ca97aeb255e3e5b55d44ddf5d66b6e0
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2022-11-16 14:28:37 -06:00
laurenw-arm
0fa7fe59f3 docs(changelog): changelog for v2.8 release
Change-Id: I1d99ea46ad527993ee786c34a67f94d74470f960
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
2022-11-16 14:10:49 -06:00
Madhukar Pappireddy
03997f187c docs(spm): partition runtime model and schedule modes
This patch documents the support for partition runtime models, call
chains and schedule modes in Hafnium SPMC.

Change-Id: I91d5718bb2c21d475499e402f6f27076930336cb
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2022-11-16 13:34:32 -06:00
Madhukar Pappireddy
b688120c98 Merge "docs(marvell): fix typo 8K => A8K" into integration 2022-11-16 18:13:48 +01:00