Allow to disable ENABLE_PIE on STM32MP2. BL31 is loaded at the beginning
of SYSRAM whatever the options set. Set ENABLE_PIE to 0 by default.
This should allow us to reduce BL31 and BL2 size.
Change-Id: Ie8c83c9205e81301eb1fdcf24b94216172586630
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
The macro STM32MP_SEC_SYSRAM_SIZE only redefine STM32MP_SYSRAM_SIZE.
Directly use the latter one and remove the STM32MP_SEC_SYSRAM_SIZE.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I9cca19fda7294be3f31ec74293ce122037541d12
Set maximum power level to 1 as power management isn't implemented yet.
Change-Id: I26cefbb5e199944d371bf06a76b2c41f73d38585
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change the size of BL31 limit allocation to be half the sysram size.
Defining BL31_PROGBITS_LIMIT to detect overflows.
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: Iccc1cc0826b8113a3c2fd6ffa77ca419795854d3
Add the required files to compile BL31 on STM32MP2.
Update BL2 configuration to load BL31. The platform boots until BL31,
but stops here as no other binaries are loaded as DDR is not
initialized.
At runtime, BL31 will use only the first half of the SYSRAM, the upper
half will be used for non-secure DMA LLIs. To be sure nothing from this
area is still in the cache, invalidate the upper SYSRAM before enabling
BL31 cache. BL31 should then map only first half of the SYSRAM. But it
must temporarily map the upper half read-only, as this is where we will
retrieve BL2 parameters, used to fill registers for next boot stages.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: Ie91527a7a26625624b4b3c65fb6a0ca9dd355dbd
To prevent from coding issues that could overwrite DT area, we were
mapping this area as read-only on STM32MP1. But on STM32MP2, we need
this area to put BL31 binary. We were then using dynamic mapping. But
the area is included in the whole SYSRAM memory mapping. This is not
allowed with dynamic mapping. As no other code is running at this step,
and we know what code is running in BL2, just remove this extra
read-only protection for STM32MP2. A message is added after the post
load process of FW-CONFIG file, as BL2 DT area will be overwritten
after that.
And remove the now useless macros DTB_BASE & DTB_LIMIT.
This corrects Coverity issue: CID 443168.
Change-Id: Ic01d6a443ecf7721380ef39dc570e2d1627008d0
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Configure the first steps for STM32MP2 BL2 platform boot:
- Save boot context address for later use
- Configure BL2 MMU
- Load and use BL2 DT
- Reset backup domain
- Initialize clocks
- Configure UART for console
- Print some info about board and reset reason
- Setup storage (only SD-card for the moment)
The platform boot stops at BL2 image load, as bl2_mem_params_descs[]
is still empty.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If6127cfbf77825a03afe8d65ba47c8c0661de496
This new STMicroelectronics SoC is based on a dual Cortex-A35.
For the moment, only BL2 is compiled with the common parts for ST
platforms.
Change-Id: I1bc4e6835dba4230359ea9b26d736791e27258aa
Signed-off-by: Yann Gautier <yann.gautier@st.com>
