Commit graph

60 commits

Author SHA1 Message Date
Chris Kay
bdcef87cf5 feat(aarch64): add DBGPRCR_EL1 register accessors
This is a small change adding accessor functions for the Debug Power
Control register (DBGPRCR_EL1) to the common architectural helpers.

Change-Id: I72261fbf0395d900347b46af320093ed946aa73d
Signed-off-by: Chris Kay <chris.kay@arm.com>
2025-01-02 11:23:55 +01:00
Gavin Liu
b741293f34 feat(mediatek): move plat_helpers.h to the common folder
The plat_helpers.h is identical across various platforms, moved to the
common folder for easier maintenance.

Change-Id: Ic9f10c697fcda7e3cfbf32e67486c9cd28481b8a
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
2024-11-05 15:46:19 +08:00
kiwi liu
7587cfdd96 feat(mt8192): update memory protect region
SCP memory protect region need to align to SCP DRAM range.
Refer to
https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/baseboard/mtscp-rv32i/baseboard.h;l=132

Change-Id: I7d9444d5339f71e6bfdd9999a217e0c177e8199f
Signed-off-by: Kiwi Liu <kiwi.liu@mediatek.corp-partner.google.com>
2024-07-09 15:49:03 +02:00
Gavin Liu
240a1ecd18 feat(mediatek): configure DEV_IRQ as G1S interrupt
In order to register DEV_IRQ as secure interrupt in OP-TEE, the the GICD
EnableGrp1S should be enabled for DEV_IRQ. Add mtk_interrupt_props in
MTK GIC driver to configure the interrupt properly.

Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
Change-Id: Id909a42b535088c6d0dcaf803d3f2faf312ae846
2024-06-20 15:33:51 +08:00
Elyes Haouas
1b491eead5 fix(tree): correct some typos
found using codespell (https://github.com/codespell-project/codespell).

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373
2023-05-09 15:57:12 +01:00
Chris Kay
da04341ed5 build: always prefix section names with .
Some of our specialized sections are not prefixed with the conventional
period. The compiler uses input section names to derive certain other
section names (e.g. `.rela.text`, `.relacpu_ops`), and these can be
difficult to select in linker scripts when there is a lack of a
delimiter.

This change introduces the period prefix to all specialized section
names.

BREAKING-CHANGE: All input and output linker section names have been
 prefixed with the period character, e.g. `cpu_ops` -> `.cpu_ops`.

Change-Id: I51c13c5266d5975fbd944ef4961328e72f82fc1c
Signed-off-by: Chris Kay <chris.kay@arm.com>
2023-02-20 18:29:33 +00:00
Liju-Clr Chen
b0208c73af refactor(mediatek): change the parameters of LPM API
Change the parameters of the LPM API for further extension.

Change-Id: Id8897c256c2118d00c6b9f3e7424ebc6100f02eb
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2023-01-11 13:37:50 +08:00
Liju-Clr Chen
1c5fc9a254 refactor(mediatek): change LPM header file path for further extension
Move `mt_lp_rm.h` to `plat/mediatek/include/lpm` for further extension.

Change-Id: If377ce6791ce80f82643b0f2466eb0f1aa5aa40b
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
2023-01-11 13:37:48 +08:00
Bo-Chen Chen
cd7890d79e feat(mediatek): move lpm drivers back to common
In order to sync drivers with MediaTek internal code base, we move lpm
drivers back to common folder.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I1066e092febe0abb9782a46f668613e137737c88
2022-10-04 09:52:10 +08:00
Bo-Chen Chen
3bdd9a24e9 refactor(mediatek): refactor plat_sip_calls.h for mt8192/mt8195/mt8186
- MTK_SIP_KERNEL_DFD can be moved to mtk_sip_def.h.
- Remove unused MTK_SIP_* definations which are already defined in
  mtk_sip_def.h.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Ife8f1e842d986691488548632426f194199d42b9
2022-09-08 18:01:49 +08:00
Bo-Chen Chen
80fa75842d refator(mediatek): move pmic.[c|h] to common folder
These two files are identical on MT8192 and MT8195. They can also be
used on MT8188. So move them to common/drivers/pmic/.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I8c12d15f1da79ab5767ac02b3ab70e8508155ee8
2022-09-05 18:12:24 +08:00
Bo-Chen Chen
ca93b018dc refator(mediatek): move common definitions of pmic wrap to common folder
Some definitions can be shared among mt8192, mt8195, and
mt8186, so move them to pmic_wrap_init_common.h.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I992b61a47a84039fe8c246e2ff75721c57ee41a5
2022-09-05 18:12:24 +08:00
Rex-BC Chen
cc76896d9e feat(mediatek): move mtk_cirq.c drivers to cirq folder
To use cirq drivers more easier, we place mtk_cirq.c and mtk_cirq.h
to common/drivers/cirq.

We also rename mtk_cirq.c/h to mt_cirq.c/h for consistency with other
driver folders.

TEST=build pass for mt8192/mt8195/mt8186
BUG=b:236331724

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I71bc442f00b16fb4031260937982c0496fcaaea0
2022-09-05 13:53:13 +08:00
Bo-Chen Chen
3374752fc1 refator(mediatek): move drivers folder in common to plat/mediatek
We plan to put some soc related drivers in common/drivers. To reduce
confision, we move them to plat/mediatek.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I6b344e660f40a23b15151aab073d3045b28f52aa
2022-09-05 13:52:17 +08:00
Leon Chen
2f3f5939a1 refactor(mediatek): partition MTK SiP SMC ID
Manage MTK SiP SMC ID with macros for 32/64 bit and
function declaration code generation.
Partition SMC ID with different exception level sources.

Signed-off-by: Leon Chen <leon.chen@mediatek.com>
Change-Id: I8966cd94f0d825e7ebae08833d2bd9fceedfd45e
2022-08-30 16:47:43 +08:00
Rex-BC Chen
5183e637a0 feat(plat/mdeiatek/mt8192): add DFD control in SiP service
DFD (Design for Debug) is a debugging tool, which scans
flip-flops and dumps to internal RAM on the WDT reset.
After system reboots, those values could be showed for
debugging.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I9c7af9a4f75216ed2c6b44458d121a352bef4b95
2021-08-10 09:41:15 +08:00
Roger Lu
310c3a26e1 fix(mediatek/mt8192/spm): add missing bit define for debug purpose
Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Change-Id: I6dbf6d4ea6310c3371ca15d1e7cce249a05af2fb
2021-07-21 03:36:14 +02:00
Jiaxin Yu
6c4973b0a9 feat(plat/mediatek/mpu): add MPU support for DSP
Forbidden domain D4(DSP) access 0x40000000~0x1FFFF0000.

Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
Change-Id: If409df10cecbcccc493d7958ab2765fd110d9009
2021-05-31 10:13:16 +01:00
Flora Fu
f46e1f1853 feat(plat/mediatek/apu): add mt8192 APU device apc driver
Add APU device apc driver and setup permission.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: I2bbdb69d11267e4252b2138b5c5ac8faf752740f
2021-05-26 12:40:02 +08:00
Flora Fu
ca4c0c2e78 feat(plat/mediatek/apu): add mt8192 APU SiP call support
Add APU SiP call support for start/stop mcu.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: Ibf93d8ccf22c414de3093cee9e13f7668588f69e
Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@mediatek.com>
2021-05-26 12:29:32 +08:00
Flora Fu
2671f31872 feat(plat/mediatek/apu): add mt8192 APU iommap regions
Add APU iommap settings for reviser, apu_ao and
devapc control wrapper.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: Ie8e6a197c0f440f9e4ee8101202283a2dbf501a6
2021-05-25 14:49:30 +08:00
Flora Fu
77b6801966 feat(plat/mediatek/apu): setup mt8192 APU_S_S_4 and APU_S_S_5 permission
Setup APU_S_S_4/APU_S_S_5 permission as SEC_RW_ONLY.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: I6c50b2913bf34270a1b0ffaf0e0c435fee192a4c
2021-05-25 14:48:58 +08:00
Manish Pandey
a92b02566e Merge changes I20c73f6e,I9962263c,I177796e3,I6ff6875c,I21fe9d85, ... into integration
* changes:
  mediatek: mt8195: add rtc power off sequence
  mediatek: mt8195: add power-off support
  mediatek: mt8195: Add reboot function for PSCI
  mediatek: mt8195: Add gpio driver
  mediatek: mt8195: Add SiP service
  mediatek: mt8195: Add CPU hotplug and MCDI support
  mediatek: mt8195: Add MCDI drivers
  mediatek: mt8195: Add SPMC driver
  mediatek: mt8195: Initialize delay_timer
  mediatek: mt8195: initialize systimer
  mediatek: mt8192: move timer driver to common folder
  mediatek: mt8195: add sys_cirq support
  mediatek: mt8195: initialize GIC
  Initialize platform for MediaTek MT8195
2021-04-26 16:12:49 +02:00
Yidi Lin
c52a10a28e mediatek: mt8195: add rtc power off sequence
mt8195 also uses mt6359p RTC. Revice mt8192 RTC and share the
driver with mt8195.

Change-Id: I20c73f6e0af67ef9d4c3d4e0ff373f93950e07db
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
2021-04-23 10:00:05 +08:00
mtk20895
aebd4dc8ff mediatek: mt8195: Add gpio driver
Add gpio driver.

Signed-off-by: mtk20895 <zhiqiang.ma@mediatek.com>
Change-Id: I6ff6875c35294f56f2d8298d75cd18c230aad211
2021-04-23 10:00:04 +08:00
Yidi Lin
46946036de mediatek: mt8192: move timer driver to common folder
The timer driver can be shared with mt8195. Move the the timer
driver to common/.

Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: I84c97ab9cc9b469f35e0f44dd8e7b2b95f1b3926
2021-04-23 10:00:04 +08:00
gtk_pangao
e5490f9557 mediatek: mt8195: add sys_cirq support
MT8192 cirq driver can be shared with MT8195. Move cirq driver to common
common folder.

Signed-off-by: gtk_pangao <gtk_pangao@mediatek.com>
Change-Id: Iba5cdcfd2116f0bd07e0497250f2da45613e3a4f
2021-04-23 10:00:04 +08:00
christine.zhu
c63f1451e2 mediatek: mt8195: initialize GIC
MT8192 GIC driver can be shared with MT8195. Move GIC driver to common
and do the initialization.

Signed-off-by: christine.zhu <christine.zhu@mediatek.corp-partner.google.com>
Change-Id: I63f3e668b5ca6df8bcf17b5cd4d53fa84f330fed
2021-04-23 10:00:04 +08:00
Madhukar Pappireddy
a262546fc4 Merge "mediatek: mt8192: devapc: Add devapc driver" into integration 2021-04-22 16:19:16 +02:00
Nina Wu
6b822d494f mediatek: mt8192: devapc: Add devapc driver
Add devapc driver for setting default permission.

Change-Id: I103f27ae090fbed76ce9319606ac082d78b74566
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
2021-04-20 13:16:28 +08:00
Yidi Lin
7e78300fc1 mediatek: move uart.h to common folder
UART register definition is the same on MediaTek platforms.
Move uart.h to common folder and remove the duplicate file.

Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: Iea0931dfd606ae4a7ab475b9cb3a08dc6de68b36
2021-04-15 19:48:58 +08:00
Roger Lu
6d98e75038 mediatek: mt8192: fix MISSING_BREAK
The case for value "VCOREFS_SMC_CMD_INIT" is not
terminated by a "break" statement.

Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Change-Id: I56cc7c1648e101c0da6e77e592e6edbd5d37724e
2021-03-08 11:42:37 +08:00
Xi Chen
a564bdc551 mediatek: mt8192: Add MPU Support for SCP/PCIe
1 Only enable domain D0 and D1:PCIe access 0xC0000000~0xC4000000;
2 Only enable domain D0 and D3(SCP) access 0x50000000~0x51400000;

Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: Ic4f9e6d85bfd1cebdb24ffc1d14309c89c103b2a
2021-03-03 19:07:45 +08:00
Roger Lu
f3febcca5a mediatek: mt8192: Add Vcore DVFS driver
Change-Id: I4bd4612a7c7727a5be70957ae940e5f51c7ca5e6
Signed-off-by: Roger Lu <roger.lu@mediatek.com>
2021-03-03 19:04:43 +08:00
Roger Lu
ebb44440a7 mediatek: mt8192: Add SPM suspend driver
Supports dram/mainpll/26m off when system suspend

Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Change-Id: Id13a06d4132f00fb60066de75920ecac18306e32
2021-03-03 19:04:43 +08:00
Roger Lu
df60025fe2 mediatek: mt8192: supports mcusys off when system suspend
Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Change-Id: I0ea7f61085ea9ba26c580107ef0cb9940a25f5e2
2021-03-03 19:04:43 +08:00
Roger Lu
cab4919955 mediatek: mt8192: Add lpm driver
Low Power Management (LPM) helps find a suitable configuration
for letting system entering idle or suspend with the most
resources off.

Change-Id: Ie6a7063b666cf338cff5bc972c9025b26de482eb
Signed-off-by: Roger Lu <roger.lu@mediatek.com>
2021-03-03 19:04:43 +08:00
Yuchen Huang
b686d33095 mediatek: mt8192: add rtc power off sequence
add mt6359p rtc power off sequence and enable k_eosc mode

Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.com>
Change-Id: I65450c63c44ccb5082541dbbe28b8aa0a95ecc56
2020-12-16 17:22:02 +08:00
Yidi Lin
44ad5d67cf mediatek: mt8192: Fix non-MISRA compliant code
CID 364146: Control flow issues (DEADCODE)

Since the value of PSTATE_PWR_LVL_MASK and the value the of PLAT_MAX_PWR_LVL
are equal on mt8192, the following equation never hold.

if (aff_lvl > PLAT_MAX_PWR_LVL) {
	return PSCI_E_INVALID_PARAMS;
}

Remove the deadcode to comply with MISRA standard.

Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: I71d0aa826eded8c3b5af961e733167ae40699398
2020-12-16 17:22:02 +08:00
Yidi Lin
04589e2b1e mediatek: mt8192: Fix non-MISRA compliant code
CID 364144: Integer handling issues (NO_EFFECT)

The unsigned value is always greater-than-or-equal-to-zero.
Remove such check.

Change-Id: Ia395eb32f55a7098d2581ce7f548b7e1112beaa0
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
2020-12-16 17:22:02 +08:00
Xi Chen
42f2fa823f mediatek: mt8192: Add MPU support
1 Add Domain1(PCIe device) protect address: 0x80000000~0x83FF0000.
2 Add Domain2(SSPM/SPM/DPM/MCUPM) protect address: 0x40000000~0x1FFFF0000.

Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: I4aaed37150076ae5943484c4adadac999a3d1762
2020-12-16 17:22:02 +08:00
Nina Wu
43d7bbcc6c mediatek: mt8192: dcm: Add mcusys related dcm drivers
1. Add mcusys related dcm drivers
2. Turn on mcusys-related dcm by default

Change-Id: Ibbee37c87cc38e7a6cd7c93c2fc0817aad6dbe95
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
2020-12-07 23:31:19 +00:00
elly.chiang
8709c939d8 mediatek: mt8192: add ptp3 driver
enable PTP3 for protecting sysPi

Signed-off-by: elly.chiang <elly.chiang@mediatek.com>
Change-Id: Ic3a13c8314f829dca8547861b98639d1d9444eb2
2020-12-07 23:31:05 +00:00
Nina Wu
189f038f55 mediatek: mt8192: Add SiP service
Add the basic SiP service

Change-Id: Ib7f2380aab910adf8d33498a79ecd287273907c5
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
2020-12-07 23:30:43 +00:00
Yuchen Huang
bb28dc7aea mediatek: mt8192: add uart save and restore api
When system resume, we want to print log as soon as possible.
So we add uart save and restore api, and they will be called
when systtem suspend and resume.

Change-Id: I83b477fd2b39567c9c6b70534ef186993f7053ae
Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.com>
Signed-off-by: Roger Lu <roger.lu@mediatek.com>
2020-12-07 23:30:27 +00:00
G.Pangao
49fd68abe4 mediatek: mt8192: modify sys_cirq driver
1.Modify this driver to make it more complete and more standard.
2.And makes this driver available for more IC services.
3.Solve some bugs in the software.

Signed-off-by: G.Pangao <gtk_pangao@mediatek.com>
Change-Id: I284956d47ebbbd550ec93767679181185e442348
2020-12-07 23:30:14 +00:00
Hsin-Hsiung Wang
26f3dbe2d6 mediatek: mt8192: add power-off support
add power-off support

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Change-Id: If19e99971515a8ae1ac9ae21046e4382adc18a69
2020-12-07 23:29:47 +00:00
Hsin-Hsiung Wang
cbd6331beb mediatek: mt8192: add pmic mt6359p driver
add pmic mt6359p driver

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Change-Id: I20f2218f7d2087e8d2bf31258cf92a02e0dab77d
2020-12-07 23:28:48 +00:00
Nina Wu
95cc889488 mediatek: mt8192: Initialize delay_timer
Init delay_timer for the use of delay functions

Change-Id: I35aefd7515bb9259634c8b6bc37d8c74da96e8f1
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
2020-12-07 23:28:33 +00:00
Dehui Sun
f3fbacaa9a mediatek: mt8192: enable NS access for systimer
Enable NS access for all systimers.

Signed-off-by: Dehui Sun <dehui.sun@mediatek.com>
Change-Id: I3693997082a1d6f09fef5a79b6cf5a91be46cb8a
2020-12-07 23:28:05 +00:00