Commit graph

7 commits

Author SHA1 Message Date
Gabriel Fernandez
66d7c8bf8e feat(stm32mp1-fdts): remove PLL1 settings
TF-A BL2 always boot at 650MHz using an algorithm to calculate PLL1
settings, without reading DT. Remove the corresponding nodes.

Change-Id: I0003337d8d37df7b2a70a84b5475f4278c4c4669
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
2024-06-11 14:02:10 +02:00
Gabriel Fernandez
4391e5edea feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1
RCC bindings alignment with MP13 RCC bindings

Change-Id: I02c89accd51e4214cd009d4a9433d8d9b6aeba25
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
2024-06-11 14:02:10 +02:00
Lionel Debieve
d594239d4e feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation
LSI was too slow to provide enough random numbers (limited
to 6ms for 16 bytes production). Switch to CSI that allow
to get the RNG fifo ready in less than 50µs.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I76d1fe58e2f4d5416a96f48123ae36bd82d8a8ee
2024-06-11 11:45:38 +02:00
Yann Gautier
b8816d3cbd refactor(st): use dashes for BSEC node names
This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it align some nodes with Linux or OP-TEE.

[1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/

Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2024-01-18 11:30:42 +01:00
Yann Gautier
0791aaf442 refactor(stm32mp15-fdts): remove RCC secure-status
The RCC security is managed with a dedicated compatible:
"st,stm32mp1-rcc-secure" [1].
Remove useless secure-status property in boards rcc nodes.

[1] 812daf916c ("feat(st): update the security based on new compatible")

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iff31044ade78dd9c432120dce65375fe2b0d36d6
2022-08-26 12:59:57 +02:00
Ahmad Fatoum
9eed71b722 fix(stm32mp1): fdts: stm32mp1: align DDR regulators with new driver
With recent changes, TF-A now panics on MC-1, Avenger96 and Odyssey:

  NOTICE:  CPU: STM32MP157C?? Rev.B
  NOTICE:  Model: Linux Automation MC-1 board
  ERROR:   regul ldo3: max value 750 is invalid
  PANIC at PC : 0x2ffeebb7

as the driver takes great offense at the content of the device
tree. The parts in question were copy-pasted from ST DTs, but
those ST DTs were fixed by commit 67d95409ba
("refactor(stm32mp1-fdts): update regulator description").

Fix the breakage by transplanting the same changes into all
remaining STM32MP1 DTs.

Change was boot-tested on MC-1, but only build tested for the
other two.

Fixes: bba9fdee58 ("feat(stm32mp1): add regulator framework compilation")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Change-Id: I143d0091625f62c313b3b71449c9ad99583d01c8
2022-06-02 06:47:20 +02:00
Grzegorz Szymaszek
c3c6732f8e fdts: stm32mp1: add support for the Seeed Odyssey SoM and board
Seeed Studio’s SoM‐STM32MP157C is a System‐on‐Module that integrates the
STM32MP157C MPU (the 650 MHz dual‐core variant with a GPU and a
cryptographic processor) the STPMIC1A PMIC, 512 MB of DDR3 RAM and a
4 GB eMMC. There are two LEDs as well, one hardwired to the PMIC’s VDD
output, and the other available at the MPU’s port PG3. The SoM can be
plugged into a carrier board using its three 70‑pin connectors.

Seeed Odyssey‐STM32MP157C is the reference carrier board for the SoM in
a Raspberry Pi‐like form factor. It features a WiFi/Bluetooth chip, a
microSD card port and various I/O interfaces.

The device tree is based on the DKx boards. TF‑A was successfully tested
on the board with Buildroot 2021.02 and U-Boot 2021.04.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Change-Id: I2c9aecc925561e8d338dddbb192d3bb23a533914
2021-04-21 19:56:10 +02:00