After resume from APD power down, XRDC is initialized by S400 but
the PAC2 and MSC0-2 are not configured, so only DBD owner can access
the resources.
We have to move GPIO restore after TFA XRDC reinit and configure
PDAC for PCC5 before enabling eDMA2 MP clock
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I82748de080151b0bdf1cace092b7892a1e402a27
Add the initial xRDC support on i.MX8ULP.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I93ea8e2cebb049e6f20e71cfe50c7583a3228f38