Commit graph

5 commits

Author SHA1 Message Date
John Tsichritzis
b04ea14b79 Rename Cortex-Ares filenames to Neoverse N1
Change-Id: I0bb5aca9bb272332340b5baefc473a01f8a27896
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
2019-02-19 13:49:59 +00:00
Soby Mathew
66ec7121bd Fix the Cortex-ares errata reporting function name
This patch fixes the name of the Cortex-ares errata function which was
previously named `cortex_a72_errata_report` which was an error.

Change-Id: Ia124df4628261021baa8d9a30308bc286d45712b
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2018-09-10 11:51:31 +01:00
Dimitris Papastamos
040b546e94 Implement Cortex-Ares 1043202 erratum workaround
The workaround uses the instruction patching feature of the Ares cpu.

Change-Id: I868fce0dc0e8e41853dcce311f01ee3867aabb59
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-06-08 11:46:31 +01:00
Dimitris Papastamos
08268e27ab Add AMU support for Cortex-Ares
Change-Id: Ia170c12d3929a616ba80eb7645c301066641f5cc
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-06-08 11:46:31 +01:00
Isla Mitchell
abbffe98ed Add support for Cortex-Ares and Cortex-A76 CPUs
Both Cortex-Ares and Cortex-A76 CPUs use the ARM DynamIQ Shared Unit
(DSU).  The power-down and power-up sequences are therefore mostly
managed in hardware, and required software operations are simple.

Change-Id: I3a9447b5bdbdbc5ed845b20f6564d086516fa161
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
2018-06-08 11:46:31 +01:00