These registers are 32-bit registers. When accessing them using
pointers, when should explicitely divide the fixed offsets
GPDIR_REG_OFFSET and GPDAT_REG_OFFSET by 4 to land on the correct
address. While set_gpio_bit() did this correctly, clr_gpio_bit() did
not. Even though GPDIR_REG_OFFSET = 0x0, shift it as well for
consistency with GPDAT_REG_OFFSET.
Change-Id: I5b8787d8424f83462ad4bb0f2141370ca28eaf34
Signed-off-by: Antonin Godard <antoningodard@pm.me>
NXP General Purpose Input/Output driver support for
NXP platforms.
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I9a3574f1d5d12e4a65ff60f640d4e77e2defd6d4