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fix(nxp-sfp): shift gpio register offsets by 2

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These registers are 32-bit registers. When accessing them using
pointers, when should explicitely divide the fixed offsets
GPDIR_REG_OFFSET and GPDAT_REG_OFFSET by 4 to land on the correct
address. While set_gpio_bit() did this correctly, clr_gpio_bit() did
not. Even though GPDIR_REG_OFFSET = 0x0, shift it as well for
consistency with GPDAT_REG_OFFSET.

Change-Id: I5b8787d8424f83462ad4bb0f2141370ca28eaf34
Signed-off-by: Antonin Godard <antoningodard@pm.me>
This commit is contained in:
Antonin Godard 2024-05-10 09:05:16 -07:00
parent 09a1cc2a0b
commit d30312a2dc
1 changed files with 5 additions and 4 deletions
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9
drivers/nxp/gpio/nxp_gpio.c
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@ -28,8 +28,8 @@ int set_gpio_bit(uint32_t *gpio_base_addr,
ERROR("GPIO is not initialized.\n");
return GPIO_FAILURE;
}
gpdir = gpio_base_addr + GPDIR_REG_OFFSET;
/* Divide by 4 since we're operating on 32-bit pointer addresses. */
gpdir = gpio_base_addr + (GPDIR_REG_OFFSET >> 2);
gpdat = gpio_base_addr + (GPDAT_REG_OFFSET >> 2);
/*
@ -67,8 +67,9 @@ int clr_gpio_bit(uint32_t *gpio_base_addr, uint32_t bit_num)
return GPIO_FAILURE;
}
gpdir = gpio_base_addr + GPDIR_REG_OFFSET;
gpdat = gpio_base_addr + GPDAT_REG_OFFSET;
/* Divide by 4 since we're operating on 32-bit pointer addresses. */
gpdir = gpio_base_addr + (GPDIR_REG_OFFSET >> 2);
gpdat = gpio_base_addr + (GPDAT_REG_OFFSET >> 2);
/*
* Reset the corresponding bit in direction and data register