Commit graph

14452 commits

Author SHA1 Message Date
Tamas Ban
a5a5947a28 docs: rename all 'rss' files to 'rse'
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I93877ebeca1db6ee27dcb5446cc1f1a1e4e56775
2024-04-22 15:44:38 +02:00
Tamas Ban
024c49484d refactor(measured-boot): rename all 'rss' files to 'rse'
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I3bd987456ad0f5c7a003960dd543efad2ce668a8
2024-04-22 15:44:38 +02:00
Tamas Ban
955116982f refactor(rss): rename all 'rss' files to 'rse'
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I6cfca1d67e246d5079f683241021ed039cc27f74
2024-04-22 15:44:38 +02:00
Lauren Wehrmeister
9728f9915d Merge "docs(plat): remove TC1 entry from the deprecation table" into integration 2024-04-19 17:49:06 +02:00
Madhukar Pappireddy
eb69206f00 Merge "fix(spm): add device-regions used in tf-a-tests" into integration 2024-04-19 15:29:06 +02:00
Yann Gautier
85658c5695 Merge "fix(pmu): fix breakage on ARMv7 CPUs with SP_min as BL32" into integration 2024-04-19 14:04:52 +02:00
Soby Mathew
3c36d34e21 Merge "fix(gpt): declare gpt_tlbi_by_pa_ll()" into integration 2024-04-19 13:23:01 +02:00
Daniel Boulby
45716e377e fix(spm): add device-regions used in tf-a-tests
Device memory region specified in an SP manifest are now validated
against the device memory defined in the SPMC manifest. Therefore
we need to add the device memory used in the tf-a-tests to the SPMC
manifests.

Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Change-Id: I47376e67c700705d12338d7078292618a15d5546
2024-04-19 11:56:12 +01:00
Soby Mathew
832e4ed520 fix(gpt): declare gpt_tlbi_by_pa_ll()
The patch 8754cc5 accidentally removes the declaration of
gpt_tlbi_by_pa_ll() and hence breaks RME builds. This patch
fixes the same.

signed-off-by: Soby Mathew <soby.mathew@arm.com>
Change-Id: I2523982fc48bca2a1f1a36fd9bd3803b01c6916a
2024-04-19 12:27:36 +02:00
Manish V Badarkhe
4a20d5cb88 docs(plat): remove TC1 entry from the deprecation table
Since the TC1 platform has been eliminated from the TF-A source code
and CI script repository, updated the deprecation table to remove its
entry.

Change-Id: I93ae03e1f810666e9a6d0c6172a322ff1e960c71
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2024-04-19 11:18:44 +01:00
Soby Mathew
98f7b60ec6 Merge changes Ic40e1b7a,I0398b550,Ife594ed6,I3eb0f29b into integration
* changes:
  fix(gpt): unify logging messages
  chore(gpt): remove gpt_ prefix
  feat(aarch64): add functions for TLBI RPALOS
  feat(locks): add bitlock
2024-04-19 11:24:01 +02:00
Lauren Wehrmeister
c8be7c08c3 Merge "fix(docs): typo in the romlib design" into integration 2024-04-18 16:16:30 +02:00
Manish V Badarkhe
4e06355a7b Merge "docs: decrease the minimum supported OpenSSL" into integration 2024-04-18 11:34:50 +02:00
Manish V Badarkhe
3b57ae23e0 fix(docs): typo in the romlib design
There's a typo in the romlib design document when referring to
the generator script. It should be romlib_generator.py instead
of romlib_generate.py so fixed this typo.

Change-Id: I6db7ee66b13c2b0b9d8511da7e0d1b058366281b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2024-04-18 10:14:21 +01:00
Mark Dykes
46d53216e7 Merge "fix: static checks on spmc dts" into integration 2024-04-17 20:12:44 +02:00
J-Alves
c35299d6b4 fix: static checks on spmc dts
Change the header of the license to have 2024, and
replace spaces for a tab.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: If98161ad35e1ead30e1e0d3ddb4cc6348e83d6ee
2024-04-17 14:59:36 +01:00
AlexeiFedorov
b99926ef7b fix(gpt): unify logging messages
This patch modifies GPT library comments and makes
logging messages consistent with PRIx64 usage and
TF-A format used in other modules.
Minor changes are made to make the code compliant
with MISRA C requirements.

Change-Id: Ic40e1b7ac43cd9602819698d00e1ce3a8c7183ce
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
2024-04-17 14:00:16 +02:00
AlexeiFedorov
20e2683daf chore(gpt): remove gpt_ prefix
This patch removes 'gpt_' prefix from the
names of static functions for better code
readability.

Change-Id: I0398b55047a73209da598b708240fcba47c779f7
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
2024-04-17 13:59:59 +02:00
AlexeiFedorov
8754cc5d1c feat(aarch64): add functions for TLBI RPALOS
This patch adds tlbirpalos_XYZ() functions to support
TLBI RPALOS instructions for the 4KB-512MB invalidation
range.

Change-Id: Ife594ed6c746d356b4b1fdf97001a0fe2b5e8cd0
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
2024-04-17 12:59:04 +01:00
Manish Pandey
e9398e46bc Merge "fix(gicv2): fix SGIR_NSATT bitshift" into integration 2024-04-16 15:57:03 +02:00
Manish Pandey
d3604b353e Merge changes from topic "lto-fixes" into integration
* changes:
  fix(bl1): add missing `__RW_{START,END}__` symbols
  fix(fvp): don't check MPIDRs with the power controller in BL1
  fix(arm): only expose `arm_bl2_dyn_cfg_init` to BL2
  fix(cm): hide `cm_init_context_by_index` from BL1
  fix(bl1): add missing spinlock dependency
2024-04-16 15:51:44 +02:00
Manish Pandey
145572914b Merge changes from topic "hm/handoff" into integration
* changes:
  refactor(fvp): reduce max size of HW_CONFIG to 16KB
  refactor(arm): replace hard-coded HW_CONFIG DT size
2024-04-16 15:51:13 +02:00
Harrison Mutai
1b86ec5b5d docs: decrease the minimum supported OpenSSL
Our code does not preclude the use of versions 1.0.x of OpenSSL.
Instead, we discourage it's use due to security concerns. Update the
documentation to reflect this.

Change-Id: I5c60907337f10b05d5c43b0384247c5d4135db50
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2024-04-16 13:46:57 +00:00
Olivier Deprez
e75e593593 Merge "docs(build): update GCC to 13.2.Rel1 version" into integration 2024-04-16 13:58:02 +02:00
Madhukar Pappireddy
eabcde257f Merge "fix(ff-a): add NS memory node to fvp_spmc_optee_sp manifest" into integration 2024-04-15 15:57:02 +02:00
Harrison Mutai
b9ecf6458b refactor(fvp): reduce max size of HW_CONFIG to 16KB
HW_CONFIG is the hardware description consumed primarly by the Linux
kernel, and for the FVP platform, TF-A runtime firmware (BL31). Due to
both needing it, two copies of this file are made in Trusted DRAM and
SRAM. The copy in Trusted DRAM is a workaround stemming from memory
constraints in SRAM. We temporarily map the range of memory in Trusted
DRAM into BL31 to allow it to consume the configuration.  In principle,
however, BL31 execution should be limited to SRAM, hence reduce the
maximum size of the HW_CONFIG to 16KB in order to accommodate it in
SRAM. This is possible since in practice, the HW_CONFIG on FVP is only
about 11KB.

Change-Id: Idb5dc0637b402562b7177a2b4e2464c4f3f67da7
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2024-04-15 13:03:41 +00:00
AlexeiFedorov
222f885df3 feat(locks): add bitlock
This patch adds 'bitlock_t' type and bit_lock() and
bit_unlock() to support locking/release functionality
based on individual bit position. These functions use
atomic bit set and clear instructions which require
FEAT_LSE mandatory from Armv8.1.

Change-Id: I3eb0f29bbccefe6c0f69061aa701187a6364df0c
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
2024-04-15 12:14:16 +01:00
Jacob Kroon
eef240cfde fix(gicv2): fix SGIR_NSATT bitshift
See https://documentation-service.arm.com/static/5f8ff196f86e16515cdbf969?token=

Fixes: dcb31ff790

Signed-off-by: Jacob Kroon <jacob.kroon@gmail.com>
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I79ef17c4538cc3e2d65fedd4dfc2eacf55167bf6
2024-04-12 18:22:01 +02:00
Mark Dykes
0cf4fda900 Merge "fix(handoff): correct representation of tag_id" into integration 2024-04-12 17:49:46 +02:00
Soby Mathew
9bbc989f83 Merge "feat(rme): build TF-A with ENABLE_RME for Armv9.2" into integration 2024-04-12 16:25:25 +02:00
Madhukar Pappireddy
0c038fe593 Merge "fix(cm): remove ENABLE_FEAT_MTE usage" into integration 2024-04-12 15:21:12 +02:00
Olivier Deprez
71c42e98bb Merge "fix(build): wrap toolchain paths in double quotes" into integration 2024-04-12 12:18:17 +02:00
Harrison Mutai
df960bcc3b refactor(arm): replace hard-coded HW_CONFIG DT size
Ensure consistency across all Arm platforms, even those that may already
have an existing macro for this purpose.

Change-Id: I07cd4cfcacf2c991717f4c115cb0babd2c614d6f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2024-04-12 06:28:33 +00:00
Jayanth Dodderi Chidanand
a796d5aa11 fix(cm): remove ENABLE_FEAT_MTE usage
commit@c282384dbb45b6185b4aba14efebbad110d18e49
removed ENABLE_FEAT_MTE but missed its usage in
context structure declaration path.

All mte regs that are currently context saved/restored
are needed only when FEAT_MTE2 is enabled, so move to
usage of FEAT_MTE2 and remove FEAT_MTE usage

Change-Id: I6b4417485fa6b7f52a31045562600945e48e81b7
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
2024-04-12 06:42:42 +01:00
Chris Kay
4731c00bb6 fix(build): wrap toolchain paths in double quotes
Fix issue with Windows paths containing spaces. Recent toolchain
refactoring (cc277de) caused a regression in the Windows build. Ensure
toolchain path utilities wrap paths in double quoted strings.

Change-Id: I7a136e459d85cff1e9851aedf0a5272a841df09c
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Signed-off-by: Chris Kay <chris.kay@arm.com>
Co-authored-by: Chris Kay <chris.kay@arm.com>
2024-04-11 13:40:33 +00:00
Olivier Deprez
64bd9551b1 Merge "docs: clarify build environment prerequisites" into integration 2024-04-11 15:04:24 +02:00
Chris Kay
d701b48eef fix(bl1): add missing __RW_{START,END}__ symbols
These symbols are missing from BL1, which causes undefined reference
errors when linking with LTO enabled.

Change-Id: Id3eda0550c957f5ef0535f0de4ff2ad87c93b82a
Signed-off-by: Chris Kay <chris.kay@arm.com>
2024-04-11 11:20:35 +00:00
Chris Kay
6d8546f9fc fix(fvp): don't check MPIDRs with the power controller in BL1
The core platform layer requires an implementation for the
`plat_core_pos_by_mpidr` function. This implementation is currently
missing in BL1, which causes undefined reference errors when linking
with LTO.

The FVP platform source file providing this implementation is the
`fvp_topology.c` file, so this change adds it to the BL1 sources for the
FVP.

However, the implementation of this function reaches out to the FVP
power controller driver - `fvp_pm.c` -  to validate the MPIDR, and this
file has at least two other dependencies:

- `spe.c`
- `arm_gicvX.c`

Pulling these in correctly is no simple job, so I am simply removing the
power controller validation in BL1 builds.

Change-Id: I56ddf1d799f5fe7f5b0fb2b046f7fe8232b07b27
Signed-off-by: Chris Kay <chris.kay@arm.com>
2024-04-11 11:20:35 +00:00
Chris Kay
3b48ca17f3 fix(arm): only expose arm_bl2_dyn_cfg_init to BL2
The `arm_bl2_dyn_cfg_init` function is intended exclusively for BL2 - it
should not be compiled for any other bootloader image. This change hides
it for all but BL2.

Change-Id: I9fa95094dcc30f9fa4cc7bc5b3119ceae82df1ea
Signed-off-by: Chris Kay <chris.kay@arm.com>
2024-04-11 11:20:35 +00:00
Chris Kay
a6b3643c2a fix(cm): hide cm_init_context_by_index from BL1
BL1 requires the context management library but does not use or
implement `cm_init_context_by_index`. This change ensures that is not
compiled into BL1, as linking with LTO enabled causes an undefined
reference for this function.

Change-Id: I4a4602843bd75bc4f47b3e0c4c5a6efce1514ef6
Signed-off-by: Chris Kay <chris.kay@arm.com>
2024-04-11 11:20:32 +00:00
Chris Kay
e40b563e87 fix(bl1): add missing spinlock dependency
The spinlock functions from `spinlock.S` are used by `errata_report.c`,
which is pulled into BL1. In a normal build it appears that this
function call undergoes dead code elimination so the link error is not
reported, but when compiled with LTO enabled the linker reports an
undefined reference.

Change-Id: Id22ffa8c0c8d3ca4b4cd46f0f4aefa53907c8de5
Signed-off-by: Chris Kay <chris.kay@arm.com>
2024-04-11 11:20:04 +00:00
Mark Dykes
a6cb061b62 Merge "fix(cc): code coverage optimization fix" into integration 2024-04-10 20:15:00 +02:00
Mark Dykes
bbe901f3bd Merge "feat(build): redirect stdin to nul during toolchain detection" into integration 2024-04-10 16:46:21 +02:00
Jayanth Dodderi Chidanand
90801842e5 docs(build): update GCC to 13.2.Rel1 version
Updating toolchain to the latest production release version
13.2.Rel1 publicly available on:
https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads

We build TF-A in CI using x86_64 Linux hosted cross toolchains:
---------------------------------------------------------------
* AArch32 bare-metal target (arm-none-eabi)
* AArch64 bare-metal target (aarch64-none-elf)

Change-Id: I9b60728bcb1a48508ccd4fcbe0114b3029509a64
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
2024-04-10 14:34:43 +01:00
Harrison Mutai
ab4d5dfe2f docs: clarify build environment prerequisites
Our build system extensively uses syntax and tools that are not natively
supported by Windows shells (i.e., CMD.exe and Powershell). This
dependency necessitates a UNIX-compatible build environment. This commit
updates the prerequisites section in our documentation to reflect this.

Change-Id: Ia7e02d7a335e6c88bbaa0394650f1313cdfd6e40
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2024-04-09 13:33:19 +00:00
Ahmad Fatoum
b9014f858d feat(build): redirect stdin to nul during toolchain detection
It's common for Makefiles to use variables like CC, AS or LD instead of
hardcoding the name of binaries. These can be defined by the user to
use a differnet toolchain or even as a crutch to enable cross-compilation.

In TF-A, this is not needed, as support for cross-compilation is baked
in via the CROSS_COMPILE option. TF-A still defined AS for its internal
use, but unlike most other projects, the default was setting it to the C
compiler. Overriding it wasn't possible from the environment though,
only as a make argument, so this didn't cause much issue.

With commit cc277de816 ("build: refactor toolchain detection"), AS can
now also be set from the environment. This breaks any scripts that
supply make with a cross environment that sets AS to an assembler.

Doing so was without effect before, but now leads to a quite ugly failure
mode: As TF-A now tries to detect the toolchain, it will call AS with the
option -v, which for GNU as(1) prints the version, but doesn't exit.

Thus, as(1) will continue waiting on stdin input and the build hangs
without much indication what's wrong.

Avoid this failure mode by ensuring any tool that attempts to read stdin
during toolchain detection will immediately get EOF and exit, leading to
an error message later on instead of the build hang.

Change-Id: I79a84961f5a69250292caa7f9e879a65be4bd9f2
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
2024-04-09 12:17:02 +02:00
Mark Dykes
4b50d7582f Merge "fix(cm): add more system registers to EL1 context mgmt" into integration 2024-04-08 23:14:03 +02:00
Mark Dykes
152ad112d7
fix(cc): code coverage optimization fix
Resolve issue where optimization is enabled for TF-A using
-Og and compile fail is seen in PSCI module.

Change-Id: Id9afb5c56a6937e7040b20cd01080c190c8276d5
Signed-off-by: Mark Dykes <mark.dykes@arm.com>
2024-04-08 13:38:01 -05:00
Karl Meakin
92bba3e711 fix(ff-a): add NS memory node to fvp_spmc_optee_sp manifest
FFA_RXTX_MAP now requires the buffers to be in non-secure memory. This
patch ensures that a region of non-secure memory is available so that
tftf tests can pass.

Change-Id: I9daf3182e0dcb73d2bf5a5baffb1b4b78c724dcb
Signed-off-by: Karl Meakin <karl.meakin@arm.com>
2024-04-08 16:05:55 +01:00
Olivier Deprez
04e9c66a36 Merge "docs: update release and code freeze dates" into integration 2024-04-08 14:22:20 +02:00