Extend board detection with saving information about PS,
PMC and RTL versions. Variables can be use to cover
different behavior based on version and version
information is also printed for chip identification.
Change-Id: Ia37418f6a31426a5763fb89fc76fef91d09df155
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>
This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential type
category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.
Change-Id: Ia352e3cf261b52777c1c431701e1e6c3be9cd279
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
This corrects the MISRA violation C2012-5.8:
Identifiers that define objects or functions with
external linkage shall be unique.
Modify the variable name to prevent conflict with
external object linkage.
Change-Id: I2448e4ad0660e654ceb40940e0046d2f2899b41b
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
Replace #if defined(TRANSFER_LIST) by #if TRANSFER_LIST.
By default TRANSFER_LIST macro is defined with value 0 in Makefile.
So checking if the macro is defined will always be true and instead
need to check the value of the macro to add the conditional code.
Change-Id: I90b06f378326d5e03ad576377ad173e81b100f56
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal NET platform. System starts with AMD PLM
firmware which loads TF-A(bl31) to memory, which is already configured, and
jumps to it. PLM also prepare handoff structure for TF-A with information
what components were load and flags which indicate which EL level SW should
be started.
Change-Id: I5065b1b7ec4ee58e77dc4096747758480c84009c
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
