Commit graph

31 commits

Author SHA1 Message Date
Maheedhar Bollapalli
3f6d47945a fix(zynqmp): modify function to have single return
This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Ibff3df16b4c591384467771bc7cb316f1773f1ea
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
2025-01-15 05:46:12 +00:00
Nithin G
e4a0c44f69 fix(zynqmp): add missing curly braces
This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement body within the curly braces.

Change-Id: I8941f3c713586c36396e1f3731b99ffadc28c6e8
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
2024-12-23 09:04:23 +00:00
Maheedhar Bollapalli
895e8029aa fix(zynqmp): typecast expressions to match data type
This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic conversions
are performed shall have the same essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: I847af07f5e4f139384c1ed50bee765b892a6e9cd
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
2024-12-20 11:00:49 +00:00
Maheedhar Bollapalli
355ccf895e fix(zynqmp): ignore the unused function return value
This corrects the MISRA violation C2012-17.7:
The value returned by a function having non-void return type shall
be used.
Typecast the function call to void to discard the return value.

Change-Id: I097863843ee125e51c709fa964f0524dc984cebe
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
2024-10-30 12:48:15 +05:30
Maheedhar Bollapalli
a42e6e44b8 fix(zynqmp): modify conditions to have boolean type
This corrects the MISRA violation C2012-14.4:
The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essentially
boolean type.
Updated controlling expression to explicitly compare with zero.

Change-Id: I5bf7070db9bced50f5d37a3d9406301585930b50
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
2024-10-30 07:05:30 +00:00
Maheedhar Bollapalli
5b542313f8 fix(zynqmp): explicitly check operators precedence
This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.

Change-Id: Id8b901634580bf64cc5022372ba385626f342246
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
2024-10-25 09:00:23 +00:00
Ronak Jain
655e62aa5b fix(xilinx): follow MISRA-C standards for condition check
As per the MISRA-C standards, there should be proc == NULL not just
!proc.

Fix the same.

Change-Id: I0e7650c09b045882a0235869d7ef9fca27f96d9a
Signed-off-by: Ronak Jain <ronak.jain@amd.com>
2024-05-08 05:33:46 -07:00
Michal Simek
652c1ab152 fix(xilinx): check proc variable before use
Check return value from pm_get_proc() to make sure that CPU is valid.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: If51b5d42ce87f31fd732ab58ae8fcd0e2db0a2a8
2024-04-19 12:20:09 +02:00
Michal Simek
619bc13eda style(xilinx): replace ARM by Arm in copyrights
The commit 6bb49c876c ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure that pre-commit.copyright won't be touching platform specific
files.

Change-Id: I49c66e18d46ed871a6aa128c9b2a403d0cf83416
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-04-14 08:54:37 +02:00
Jay Buddhabhatti
a92681d926 refactor(xilinx): move versal files to common place
Moved necessary files to common place so that it can be used for
Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I611fa849207b082e6599acfb65c55d27b9c99435
2023-03-27 22:57:00 -07:00
Venkatesh Yadav Abbarapu
bfd7c88190 feat(zynqmp): resolve the misra 10.1 warnings
MISRA Violation: MISRA-C:2012 R.10.1
1) The expression of non-boolean essential type is being interpreted as a
boolean value for the operator.
2) The operand to the operator does not have an essentially unsigned type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I97bbc056f4fee167742429e144144ba793bf77b3
2022-07-07 10:20:48 +02:00
Venkatesh Yadav Abbarapu
ffa910312c fix(zynqmp): resolve the misra 4.6 warnings
MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I9fb686e7aa2b85af6dfcb7bb5f87eddf469fb85c
2022-06-06 11:18:03 +05:30
Venkatesh Yadav Abbarapu
610eeac894 fix(zynqmp): resolve misra R8.4 warnings
MISRA Violation: MISRA-C:2012 R.8.4
- Function definition does not have a visible prototype.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I50a2c1adf2e099217770ac665f135302f990b162
2022-05-16 17:29:04 +05:30
Venkatesh Yadav Abbarapu
eb0d2b1772 fix(zynqmp): resolve misra R15.6 warnings
MISRA Violation: MISRA-C:2012 R.15.6
- The body of an iteration-statement or a selection-statement shall be
  a compound statement.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I0fc8eeac0e592f00297a1ac42a1ba3df1144733b
2022-05-06 13:45:07 +05:30
Ravi Patel
b35b556718 fix(zynqmp): query node status to power up APU
If APU is in suspending state and if wakeup request comes then
PMUFW returns error which is not handled at ATF side.

To fix this, get the APU node status before calling wakeup and
return error if found in suspending state.

Here, we can not handle the error code of pm_req_wakeup() from PMUFW
because ATF is already calling pm_client_wakeup() before calling
pm_req_wakeup().

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I18d47384e46e22ae49e804093ad0641b7a6349e2
2022-03-02 22:10:57 -08:00
Venkatesh Yadav Abbarapu
db97f93963 refactor(plat/zynqmp): optimize the code to save some space
As there is constraint with the space for the release builds,
remove some of the legacy code.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I5b8b16f34ed8e480f16ab1aeac80b85cdb391852
2021-06-17 00:43:41 -06:00
Siva Durga Prasad Paladugu
256d133a8a plat: xilinx: zynqmp: Use GIC framework for warm restart
- Flag GICV2_G0_FOR_EL3 needs to be set for group interrupts
  to be targeted to EL3.
- Raise SGI interrupts for individual CPU cores as GIC API
  uses CPU num as parameter, not CPU mask.
- Flag WARMBOOT_ENABLE_DCACHE_EARLY needs to be set to enable
  CPU interface mask work properly for all CPU cores which is
  required when generating SGI.
- Call plat_ic_end_of_interrupt() from ttc_fiq_handler() to clear
  GIC interrupt to avoid same interrupt again.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I71d4935b8d4688a3729c62753ca8a1a77cd92ae7
2020-01-15 11:01:23 -08:00
Antonio Nino Diaz
bd9344f670 plat/arm: Sanitise includes
Use full include paths like it is done for common includes.

This cleanup was started in commit d40e0e08283a ("Sanitise includes
across codebase"), but it only cleaned common files and drivers. This
patch does the same to Arm platforms.

Change-Id: If982e6450bbe84dceb56d464e282bcf5d6d9ab9b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:10 +00:00
Jolly Shah
31c3842ee8 plat: xilinx: zynqmp: Move zynqmp_private.h to include directory
Move zynqmp_private.h to platform specific include directory.
Also, rename it to plat_private.h instead of having platform
name. So, it can be used to common source files which needs
platform specific data.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Reviewed-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2019-01-09 12:05:13 -08:00
Antonio Nino Diaz
09d40e0e08 Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-04 10:43:17 +00:00
Siva Durga Prasad Paladugu
a6d28520b5 xilinx: zynqmp: Remove PMU Firmware checks
Xilinx now requires the PMU FW when using ATF, so it doesn't make sense
to maintain checks for the PMU FW in ATF. This also means that cases
where ATF came up before the PMU FW (such as on QEMU) ATF will now hang
waiting for the PMU FW instead of aborting.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2018-05-17 15:18:46 +05:30
Siva Durga Prasad Paladugu
61ef376aa2 zynqmp: pm: Allow to set shutdown scope via pm_system_shutdown API
psci system_reset and system_off calls now retrieve shutdown scope on
the fly. The default scope is system, but it can be changed by calling
pm_system_shutdown(2, scope)

Until full support for different restart scopes becomes available with
PSCI 1.1 this change allows users to set the reboot scope to match
their application needs.

Possible scope values:
0 - APU subsystem: does not affect RPU, PMU or PL
1 - PS only: shutdown/restart entire PS without affecting PL
2 - System: shutdown/restart applies to entire system

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
2018-05-17 15:12:44 +05:30
Filip Drazic
9feba2e7dd zynqmp: pm: Move pm_client_wakeup call from pm_req_wakeup
Call to pm_client_wakeup from pm_req_wakeup prevented the PM API
call to be used to wake up non-APU processor (e.g. from higher ELs),
since it clears power down request for specified APU processor.
Move this function out of pm_client_wakeup to allow passing wake up
requests to the PMU for other processor in the system.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>
2018-05-17 15:11:52 +05:30
Isla Mitchell
ee1ebbd18e Fix order of remaining platform #includes
This fix modifies the order of system includes to meet the ARM TF coding
standard. There are some exceptions to this change in order to retain
header groupings and where there are headers within #if statements.

Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
2017-07-14 10:50:41 +01:00
dp-arm
82cb2c1ad9 Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-03 09:39:28 +01:00
Soren Brinkmann
8353170321 zynqmp: PM: Migrate to new shutdown interface
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-11-16 15:48:48 -08:00
Soren Brinkmann
4fe0f4be7d zynqmp: Initialize GIC on suspend_finish
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-09-13 09:19:03 -07:00
Filip Drazic
95fd990fe6 zynqmp: pm: Provide state argument to the pm_self_suspend API call
The state argument of the pm_self_suspend API encodes the state to
which the APU intends to suspend. The state can be:
- PM_APU_STATE_CPU_IDLE - processor power down, all memories remain
  on
- PM_APU_STATE_SUSPEND_TO_RAM - all processors powered down, L2$
  powered down, all OCM banks in retention and DDR in
  self-refresh.
The calls for setting requirements for L2$ and OCM banks are now
redundant and removed.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
[ sb
 - remove redundant #defines
]
Signed-off-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
2016-09-13 09:19:03 -07:00
Stefan Krsmanovic
eccc7cde9f zynqmp: Add simple implementation of zynqmp_validate_power_state()
Implementation is based on arm_validate_power_state().
This function is called during CPU_SUSPEND PSCI call to validate
power_state parameter. If state is valid this function populate it
in req_state array as power domain level specific local state.
ATF platform migration guide chapter 2.2 defines this function as
mandatory for PSCIv1.0 CPU_SUSPEND support.

Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
2016-09-13 09:19:02 -07:00
Soren Brinkmann
e3f0391e85 zynqmp: PSCI: Wait for FW completing wake requests
Powering up cores didn't wait for the PMUFW to complete the request,
which could result in cores failing to power up in Linux.

Reported-by: Koteswararao Nayudu <kotin@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-05-25 10:47:03 -07:00
Soren Brinkmann
c8284409e1 Add support for Xilinx Zynq UltraScale+ MPSOC
The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This
patch adds the platform port for that SoC.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-04-06 10:44:27 -07:00