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11662 commits

Author SHA1 Message Date
Boyan Karatotev
291be198fa docs: describe the new warning levels
When -Wextra was added, the warning levels changed their meaning. Add a
description in the build option section and leave the security hardening
section as mostly a pointer to it.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Iabf2f598d0bf3e865c9b991c5d44d2acb9572bd5
2022-12-12 11:29:10 +00:00
Boyan Karatotev
d141e63844 build: add -Wunused-const-variable=2 to W=2
TF-A is quite strict with warnings and redundant code. This flag
furthers this so it would be useful to have it. Add it to W=2 as it sets
off a few platforms which require a somewhat involved fix.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Id52b3d477b4ada7dd69a36101ab22c575ab4ef19
2022-12-01 16:33:40 +00:00
Boyan Karatotev
d75a9ecdaa build: include -Wextra in generic builds
TF-A is more strict with compiler warnings in comparison to other
projects (notably Linux) for security and -Wextra enables a lot of
desirable warnings. This patch enables -Wextra by default (from W=1
previously) and reorganises the warning levels so that they can useful
when enabled and not just a build failure. This will help us move
towards fixing the warnings that are too many to fix at once and
enabling all W={1, 2} warnings.

The warning levels get new meanings:
* W=1: warnings we want the generic build to include but are too time
  consuming to fix at the moment. They re-enable warnings taken out for
  generic builds.
* W=2: warnings we want the generic build to include but cannot be
  enabled due to external libraries.
* W=3: warnings that are informative but not necessary and generally too
  verbose and frequently ignored.

Quality expectations for new contributions mean that generally they
should have no warnings up to W=2. To allow code to be developed with
them in mind, -Werror is disabled when W=x is set. This way enabling
warnings will not just fail the build due to technicalities we have and
contributors will be able to actually see if they get any.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ieb15ddd635d458a956a34b0f9d0ea2f81b9c0745
2022-12-01 16:33:26 +00:00
Boyan Karatotev
228b06a535 docs(porting-guide): update a reference
The BL31 part has been there forever and the PSCI reference is neither
at section 3.3 or directly below. Update this to locate the section more
easily.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I9a86e4ef13d1ac5da743917493f63ddd7690e087
2022-12-01 16:17:34 +00:00
Boyan Karatotev
02af589cfa fix(st-usb): replace redundant checks with asserts
Returning enum usb_status in an enum usb_action function is wrong as
they have different meanings. However, usb_dwc2_ep0_out_start() and
usb_dwc2_activate_setup() only return USBD_OK so we will never get to
there. Replace these checks with asserts in case the code changes in
future.

This also silences a warning when compiling with -Wextra.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I73dfd5c189a357544c15ceb3f4268da82ce272b9
2022-12-01 16:17:34 +00:00
Boyan Karatotev
9f58bfbbe9 fix(brcm): add braces around bodies of conditionals
On release builds EMMC_TRACE doesn't expand to anything. Some
conditionals with no braces end up with empty bodies. This produces a
warning when compiling with -Werror=empty-body (enabled by -Wextra).

Since TF-A coding guidelines require braces to comply with MISRA
guidelines anyway, add them in the whole file.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ib4e691efc7acdb8fb8692278c7a9772fc894f77f
2022-12-01 16:17:34 +00:00
Boyan Karatotev
90c4b3b62d fix(renesas): align incompatible function pointers
secure_boot_api_f is defined to take uint32_t, uint32_t, and void *
parameters. However rom_secure_boot_api_f is defined to take uint32_t *,
uint32_t *, void *. These are incompatible and cause a warning when
compiling with -Wextra. Align the rom definition to the more generic
definition from where it's called.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ia030803b3c2335d220aff09fc0eef5c7615276aa
2022-12-01 16:17:34 +00:00
Boyan Karatotev
d0b58c8a9b fix(zynqmp): remove redundant api_version check
The api_version is checked in pm_setup() and an error is returned. The
smc handlers will not be registered on error so doing the check again is
redundant. This also silences a warning when compiling with -Wextra.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I09395e6a20e3f6eb22a1f81ec2f6bdf034eeb4bf
2022-12-01 16:17:34 +00:00
Boyan Karatotev
f4b8470fee fix: remove old-style declarations
TF-A wants to eventually enable -Wold-style-definition globally. Convert
the rare few instances where this is still the case.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I9c450fc875cf097e6de2ed577ea3b085821c9f5e
2022-12-01 16:17:34 +00:00
Boyan Karatotev
e138400d1c fix: unify fallthrough annotations
Compiling with -Wimplicit-fallthrough=3 (enabled by -Wextra) produces
many warnings about fallthrough comments either missing or being wrong.
Unify the comments so we comply with -Wextra.

Note that Coverity recommends against using the __attribute__ directive.
Also, zlib does not build with a higher value of -Wimplicit-fallthrough.
Finally, compilers strip comments before expanding macros. As such,
checkpatch's fallthrough annotation (or higher levels of the flag) isn't
really possible.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I060cf4f8dc04c02cbb45cf4ceb69569a8369ccee
2022-12-01 16:17:24 +00:00
Lauren Wehrmeister
d3d2a5a484 Merge "fix(cpus): workaround for Cortex-X3 erratum 2615812" into integration 2022-11-28 18:15:06 +01:00
Sandrine Bailleux
bf09c416ab Merge "fix(intel): fix print out ERROR when encounter SEU_Err" into integration 2022-11-28 15:08:25 +01:00
Sandrine Bailleux
086d981657 Merge changes I8667f362,Ia0bd832c into integration
* changes:
  feat(intel): setup FPGA interface for Agilex
  fix(intel): fix pinmux handoff bug on Agilex
2022-11-28 15:07:11 +01:00
Sandrine Bailleux
c00b06a41b Merge "fix(intel): fix sp_timer0 is not disabled in firewall on Agilex" into integration 2022-11-28 15:03:16 +01:00
Sandrine Bailleux
f6620acd05 Merge "fix(intel): remove checking on TEMP and VOLT checking for HWMON" into integration 2022-11-28 15:02:41 +01:00
Sandrine Bailleux
27c07d0a00 Merge "fix(rss): remove null-terminator from RSS metadata" into integration 2022-11-28 12:46:56 +01:00
David Vincze
85a14bc0a9 fix(rss): remove null-terminator from RSS metadata
Remove the null-terminator of the string-like data items
from the RSS measurement's metadata. The 'version' and
'sw_type' items have an associated length value which
should not include a null-terminator when storing the
measurement.

Change-Id: Ia91ace2fff8b6f75686dd2e1862475268300bbdb
Signed-off-by: David Vincze <david.vincze@arm.com>
2022-11-25 18:31:14 +01:00
Joanna Farley
4ccbdd86bc Merge "fix(zynqmp): check return status of pm_get_api_version" into integration 2022-11-25 16:25:53 +01:00
Joanna Farley
896c0daf3e Merge "fix(versal): initialize the variable with value 0 in pm code" into integration 2022-11-25 16:24:53 +01:00
Naman Patel
c92ad369ca fix(zynqmp): check return status of pm_get_api_version
MISRA Violation: MISRA C-2012 Rule 17.7
- Check the return status of function pm_get_api_version
and return error in case of failure.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I69fb000c04f22996da7965a09a1797c7bfaad252
2022-11-24 05:30:23 -08:00
Naman Patel
cd73d62b0e fix(versal): initialize the variable with value 0 in pm code
Remove zeromem function as the array is already initialized
with value 0.

MISRA Violation: MISRA C-2012 Rule 9.1
- Initialize the array/variable with a value 0 to resolve
the misra warnings in pm_service component.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I1a3d44a7ae4088a3034eb0119d82b99cd4617ccd
2022-11-24 05:25:48 -08:00
Manish Pandey
53f63eb0ff Merge "feat(qemu): increase size of bl2" into integration 2022-11-24 11:41:08 +01:00
Joanna Farley
0125e86b3b Merge "fix(docs): deprecate plat_convert_pk() in v2.9" into integration 2022-11-22 17:07:05 +01:00
Jit Loon Lim
68ac5fe14c fix(intel): remove checking on TEMP and VOLT checking for HWMON
Remove high level logic hardware channel checking on HWMON
TEMP and VOLT read.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I9102b7b4334cb95f0b622c498a6569328f534d42
2022-11-22 23:56:06 +08:00
Jit Loon Lim
8de7167eb6 fix(intel): fix sp_timer0 is not disabled in firewall on Agilex
sp_timer0 is not disabled in firewall on Agilex causing Zephyr is facing
issue to access the timer.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I0099e200d6c9ca435f46393c6ed9cbe387870af0
2022-11-22 23:55:02 +08:00
Jit Loon Lim
3905f57134 feat(intel): setup FPGA interface for Agilex
Enable/Disable FPGA interfaces based on handoff configuration.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I8667f362aa53e7c68723e0dbd5284844ae39dfb5
2022-11-22 23:35:36 +08:00
Jit Loon Lim
e6c0389091 fix(intel): fix pinmux handoff bug on Agilex
Incorrect number of FPGA pinmux registers was copied from handoff data.
This caused pinmux_emac0_usefpga register to always be zero meaning
"EMAC0 uses HPS IO Pins" even if handoff data for this register was one
meaning "EMAC0 uses the FPGA Inteface".

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Ia0bd832c61d25f66ef13f39fe28b054cb96af9a1
2022-11-22 23:35:22 +08:00
Sieu Mun Tang
1a0bf6e1d8 fix(intel): fix print out ERROR when encounter SEU_Err
Print out ERROR message when system face encounter SEU_ERR

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I744afbca23b74b164e47472039b5d6fbe5c3c764
2022-11-22 23:22:45 +08:00
Yann Gautier
e0f58c7fb6 fix(docs): deprecate plat_convert_pk() in v2.9
The deprecation was tagged "Next release after 2.8". Now there is a 2.9
planned, directly use this version.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I0727eebc4a3800dafafc4166b0c2c40a12c90b4b
2022-11-22 15:15:46 +01:00
Manish Pandey
9881bb93a3 Merge "docs(spm): update threat model" into integration 2022-11-21 19:12:00 +01:00
Manish Pandey
9aef90cc7d Merge "docs(qemu): document steps to run in OpenCI" into integration 2022-11-21 18:55:23 +01:00
Madhukar Pappireddy
31b5b36c52 docs(spm): update threat model
Update SPM threat model for possible threats, from malicious
endpoints, related to interrupt management. The mitigations
are based on the guidance provided in FF-A v1.1 EAC0 spec.

Change-Id: Ib9e26e3f1c60fe3a2734a67de1dcf1cea4883d38
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2022-11-21 10:53:48 -06:00
Harrison Mutai
a5667be075 docs(qemu): document steps to run in OpenCI
Add details on how to run QEMU in OpenCI, and what tests are currently
supported.

Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Change-Id: I291e4eb64a58c766519ff7dcac4841ae75c3934e
2022-11-21 16:45:24 +00:00
Sandrine Bailleux
ca3f25dcc4 Merge "fix(intel): fix UART baud rate and clock" into integration 2022-11-21 14:57:10 +01:00
Sieu Mun Tang
8e53b2fa2e fix(intel): fix UART baud rate and clock
Revise the UART baud rate and clock for general platform build,
SIMIC build and EMU build.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I62fefe7b96d5124e75d2810b4fbc1640422b1353
2022-11-21 13:50:10 +01:00
Manish Pandey
8613c15754 Merge "docs(changelog): changelog for v2.8 release" into integration 2022-11-18 18:28:52 +01:00
Joanna Farley
f69b20dc5f Merge "fix(docs): add v2.9 release schedule" into integration 2022-11-18 17:47:14 +01:00
Joanna Farley
a846d33abc fix(docs): add v2.9 release schedule
Signed-off-by: Joanna Farley <Joanna.Farley@arm.com>
Change-Id: I082461d7d21f63e3b8cbee37e8f01b8128e4b5a0
2022-11-18 10:22:01 +02:00
Olivier Deprez
02fd5a1763 Merge changes I97687f18,I91d5718b into integration
* changes:
  docs(spm): interrupt handling guidance FF-A v1.1 EAC0
  docs(spm): partition runtime model and schedule modes
2022-11-17 11:14:05 +01:00
Harrison Mutai
c7e698cfde fix(cpus): workaround for Cortex-X3 erratum 2615812
Cortex-X3 erratum 2615812 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r1p1, and is still open. The workaround is to disable
the use of the Full Retention power mode in the core (setting
WFI_RET_CTRL and WFE_RET_CTRL in CORTEX_X3_IMP_CPUPWRCTLR_EL1 to 0b000).

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2055130/latest

Change-Id: I5ad66df3e18fc85a6b23f6662239494ee001d82f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2022-11-17 09:41:40 +00:00
Olivier Deprez
8fca0cdbee Merge changes from topic "ja/spm_doc" into integration
* changes:
  docs(spm): ff-a v1.1 indirect message
  docs(spm): s-el0 partition support update
2022-11-17 10:04:49 +01:00
Leo Yan
db2bf3ac19 feat(qemu): increase size of bl2
Increases BL2 size to have room to enable security features (like
measurement and TPM).

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Change-Id: Iba5e8923e2e154315499e9bfce2e0aff0ccc8f95
2022-11-17 16:13:03 +08:00
Madhukar Pappireddy
06afdd1e7a docs(spm): interrupt handling guidance FF-A v1.1 EAC0
This patch documents the actions taken by Hafnium SPMC in response
to non-secure and secure interrupts.

Change-Id: I97687f188ca97aeb255e3e5b55d44ddf5d66b6e0
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2022-11-16 14:28:37 -06:00
laurenw-arm
0fa7fe59f3 docs(changelog): changelog for v2.8 release
Change-Id: I1d99ea46ad527993ee786c34a67f94d74470f960
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
2022-11-16 14:10:49 -06:00
Madhukar Pappireddy
03997f187c docs(spm): partition runtime model and schedule modes
This patch documents the support for partition runtime models, call
chains and schedule modes in Hafnium SPMC.

Change-Id: I91d5718bb2c21d475499e402f6f27076930336cb
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2022-11-16 13:34:32 -06:00
Madhukar Pappireddy
b688120c98 Merge "docs(marvell): fix typo 8K => A8K" into integration 2022-11-16 18:13:48 +01:00
J-Alves
53e3b385f0 docs(spm): ff-a v1.1 indirect message
Update secure partition manager documentation to include
FF-A v1.1 indirect messaging implementation.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: Ifbca45347f775080ef98ac896d31650204318ba4
2022-11-16 15:29:45 +00:00
Manish V Badarkhe
71061819aa Merge changes If90a18ee,I02e88f8c,Iea447fb5,Ie0570481,Ieeb14cfc into integration
* changes:
  docs: add top level section numbering
  docs(build): clarify getting started section
  docs(build): clarify docs building instructions
  fix(docs): prevent a sphinx warning
  fix(docs): prevent a virtual environment from failing a build
2022-11-16 16:18:54 +01:00
Olivier Deprez
54c52bcb76 Merge "docs(spm): update FF-A manifest binding" into integration 2022-11-16 15:39:08 +01:00
Boyan Karatotev
c65bf2d134 docs: add top level section numbering
Top level sections are not numbered. Adding numbers makes referring to
sections easier. For example the Maintainers page changes from
"about/3.1" to simply "1.3.1".

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: If90a18ee8d6a6858d58f0687f31ea62b69399e04
2022-11-16 14:06:48 +00:00