5 commits

Author	SHA1	Message	Date
Sieu Mun Tang	21a01dac87	fix(intel): update outdated code for Linux direct boot ... 1. Update emif rsthdshk macro 2. Update mailbox return status 3. Update bridge return status Change-Id: I33905508aceb258ac8759c10079b2af977df0e0a Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>	2024-10-16 23:36:49 +02:00
Jit Loon Lim	6197dc98fe	feat(intel): restructure sys mgr for Agilex ... This patch is to restructure system manager. Move platform dependent MACROs to individual platform system manager. Common system manager will remain for those common declaration only. Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I2f52d3eaf47716f7dfc636bbf1a23d68a04f39cb	2023-05-23 21:13:05 +08:00
Hadi Asyrafi	3dcb94dd84	intel: Enable bridge access in Intel platform ... Add bridge enablement features for each platform. The bridge access will be enabled automatically for FPGA 1st configuration only. Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I264757b257a209e1c3c4206660f21c5d67af0d2f	2020-01-16 10:53:21 +08:00
Hadi Asyrafi	b266d82148	intel: agilex: Fix memory controller driver ... Increase calibration delay, fix ddrio control config & nonsecure region limit Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Ibca3c247a3ad5104176ca9057d29755599f13c9b	2019-08-15 09:28:06 +08:00
Hadi Asyrafi	2f11d548f2	intel: Adds support for Agilex platform ... Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Ib2ad2068abdf0b204c5cb021ea919581adaca4ef	2019-07-17 19:06:49 +08:00