Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-17 01:54:22 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Merge "feat(morello): add cpuidle support" into integration

Browse source
This commit is contained in:
Manish V Badarkhe 2023-09-06 12:47:46 +02:00 • committed by TrustedFirmware Code Review
commit eb46520c5c
3 changed files with 64 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

32
fdts/morello-fvp.dts
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2020-2022, Arm Limited. All rights reserved. * Copyright (c) 2020-2023, Arm Limited. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -25,6 +25,32 @@
}; };
}; };
/*
* The timings below are just to demonstrate working cpuidle.
* These values may be inaccurate.
*/
idle-states {
entry-method = "psci";
cluster_sleep: cluster-sleep {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x40000022>;
local-timer-stop;
entry-latency-us = <500>;
exit-latency-us = <1000>;
min-residency-us = <2500>;
};
cpu_sleep: cpu-sleep {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x40000002>;
local-timer-stop;
entry-latency-us = <150>;
exit-latency-us = <300>;
min-residency-us = <200>;
};
};
cpus { cpus {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <0>; #size-cells = <0>;
@ -53,6 +79,7 @@
device_type = "cpu"; device_type = "cpu";
enable-method = "psci"; enable-method = "psci";
clocks = <&scmi_dvfs 0>; clocks = <&scmi_dvfs 0>;
cpu-idle-states = <&cpu_sleep &cluster_sleep>;
}; };
CPU1: cpu1@100 { CPU1: cpu1@100 {
compatible = "arm,armv8"; compatible = "arm,armv8";
@ -60,6 +87,7 @@
device_type = "cpu"; device_type = "cpu";
enable-method = "psci"; enable-method = "psci";
clocks = <&scmi_dvfs 0>; clocks = <&scmi_dvfs 0>;
cpu-idle-states = <&cpu_sleep &cluster_sleep>;
}; };
CPU2: cpu2@10000 { CPU2: cpu2@10000 {
compatible = "arm,armv8"; compatible = "arm,armv8";
@ -67,6 +95,7 @@
device_type = "cpu"; device_type = "cpu";
enable-method = "psci"; enable-method = "psci";
clocks = <&scmi_dvfs 1>; clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&cpu_sleep &cluster_sleep>;
}; };
CPU3: cpu3@10100 { CPU3: cpu3@10100 {
compatible = "arm,armv8"; compatible = "arm,armv8";
@ -74,6 +103,7 @@
device_type = "cpu"; device_type = "cpu";
enable-method = "psci"; enable-method = "psci";
clocks = <&scmi_dvfs 1>; clocks = <&scmi_dvfs 1>;
cpu-idle-states = <&cpu_sleep &cluster_sleep>;
}; };
}; };

30
fdts/morello-soc.dts
View file

@ -26,6 +26,32 @@
}; };
}; };
/*
* The timings below are just to demonstrate working cpuidle.
* These values may be inaccurate.
*/
idle-states {
entry-method = "psci";
cluster_sleep: cluster-sleep {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x40000022>;
local-timer-stop;
entry-latency-us = <500>;
exit-latency-us = <1000>;
min-residency-us = <2500>;
};
cpu_sleep: cpu-sleep {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x40000002>;
local-timer-stop;
entry-latency-us = <150>;
exit-latency-us = <300>;
min-residency-us = <200>;
};
};
cpus { cpus {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <0>; #size-cells = <0>;
@ -44,6 +70,7 @@
1800000 750000 1800000 750000
>; >;
#cooling-cells = <2>; #cooling-cells = <2>;
cpu-idle-states = <&cpu_sleep &cluster_sleep>;
}; };
cpu1: cpu1@100 { cpu1: cpu1@100 {
compatible = "arm,armv8"; compatible = "arm,armv8";
@ -60,6 +87,7 @@
1800000 750000 1800000 750000
>; >;
#cooling-cells = <2>; #cooling-cells = <2>;
cpu-idle-states = <&cpu_sleep &cluster_sleep>;
}; };
cpu2: cpu2@10000 { cpu2: cpu2@10000 {
compatible = "arm,armv8"; compatible = "arm,armv8";
@ -76,6 +104,7 @@
1800000 750000 1800000 750000
>; >;
#cooling-cells = <2>; #cooling-cells = <2>;
cpu-idle-states = <&cpu_sleep &cluster_sleep>;
}; };
cpu3: cpu3@10100 { cpu3: cpu3@10100 {
compatible = "arm,armv8"; compatible = "arm,armv8";
@ -92,6 +121,7 @@
1800000 750000 1800000 750000
>; >;
#cooling-cells = <2>; #cooling-cells = <2>;
cpu-idle-states = <&cpu_sleep &cluster_sleep>;
}; };
}; };

3
plat/arm/board/morello/platform.mk
View file

@ -89,6 +89,9 @@ override ARM_PLAT_MT := 1
override ARM_BL31_IN_DRAM := 1 override ARM_BL31_IN_DRAM := 1
override PSCI_EXTENDED_STATE_ID := 1
override ARM_RECOM_STATE_ID_ENC := 1
# Errata workarounds: # Errata workarounds:
ERRATA_N1_1868343 := 1 ERRATA_N1_1868343 := 1