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Merge "fix(cpus): workaround for Cortex-A715 erratum 2413290" into integration

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Bipin Ravi 2024-03-26 01:12:57 +01:00 • committed by TrustedFirmware Code Review
commit e7419780f7
1 changed files with 5 additions and 2 deletions
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7
lib/cpus/aarch64/cortex_a715.S
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@ -60,15 +60,18 @@ workaround_reset_end cortex_a715, ERRATUM(2344187)
check_erratum_ls cortex_a715, ERRATUM(2344187), CPU_REV(1, 0) check_erratum_ls cortex_a715, ERRATUM(2344187), CPU_REV(1, 0)
/* Errata applies only when Static profiling extension is enabled. */
workaround_reset_start cortex_a715, ERRATUM(2413290), ERRATA_A715_2413290 workaround_reset_start cortex_a715, ERRATUM(2413290), ERRATA_A715_2413290
/* Apply the workaround by setting CPUACTLR_EL1[58:57] = 0b11. */ /* Erratum 2413290 workaround is required only if SPE is enabled */
#if ENABLE_SPE_FOR_NS != 0
/* Check if Static profiling extension is implemented or present. */
mrs x1, id_aa64dfr0_el1 mrs x1, id_aa64dfr0_el1
ubfx x0, x1, ID_AA64DFR0_PMS_SHIFT, #4 ubfx x0, x1, ID_AA64DFR0_PMS_SHIFT, #4
cbz x0, 1f cbz x0, 1f
/* Apply the workaround by setting CPUACTLR_EL1[58:57] = 0b11. */
sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(57) sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(57)
sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(58) sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(58)
1: 1:
#endif
workaround_reset_end cortex_a715, ERRATUM(2413290) workaround_reset_end cortex_a715, ERRATUM(2413290)
check_erratum_range cortex_a715, ERRATUM(2413290), CPU_REV(1,0), CPU_REV(1, 0) check_erratum_range cortex_a715, ERRATUM(2413290), CPU_REV(1,0), CPU_REV(1, 0)