Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-16 17:44:19 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

fix(cpus): workaround for Cortex-A715 erratum 2413290

Browse source 
Erratum 2413290 is a Cat B erratum that is present only
in revision r0p1 and is fixed in r1p1.

The initial implementation did not consider that this
fix is to be applied only when SPE (Statistical Profiling
Extension) is implemented and enabled. This patch applies
the fix by adding a check for ENABLE_SPE_FOR_NS.

Change-Id: I87b2175b89d6fb168c77e6ab233c90ca056791a1
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
This commit is contained in:
Sona Mathew 2024-03-20 14:14:43 -05:00
parent 5318255f12
commit bd2f7d3258
1 changed files with 5 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
lib/cpus/aarch64/cortex_a715.S
View file

@ -60,15 +60,18 @@ workaround_reset_end cortex_a715, ERRATUM(2344187)
check_erratum_ls cortex_a715, ERRATUM(2344187), CPU_REV(1, 0)
/* Errata applies only when Static profiling extension is enabled. */
workaround_reset_start cortex_a715, ERRATUM(2413290), ERRATA_A715_2413290
/* Apply the workaround by setting CPUACTLR_EL1[58:57] = 0b11. */
/* Erratum 2413290 workaround is required only if SPE is enabled */
#if ENABLE_SPE_FOR_NS != 0
/* Check if Static profiling extension is implemented or present. */
mrs x1, id_aa64dfr0_el1
ubfx x0, x1, ID_AA64DFR0_PMS_SHIFT, #4
cbz x0, 1f
/* Apply the workaround by setting CPUACTLR_EL1[58:57] = 0b11. */
sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(57)
sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(58)
1:
#endif
workaround_reset_end cortex_a715, ERRATUM(2413290)
check_erratum_range cortex_a715, ERRATUM(2413290), CPU_REV(1,0), CPU_REV(1, 0)