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plat/synquacer: enable OP-TEE logic only if SPD_opteed is set
The logic that initializes the BL32 entry point data structure should only be executed if we are in fact loading OP-TEE, and not if BL32_BASE is set for other reasons (i.e., when enabling SPM) Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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32e8353748
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3 changed files with 4 additions and 6 deletions
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@ -38,6 +38,8 @@
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#define BL31_SIZE 0x00080000
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#define BL31_LIMIT (BL31_BASE + BL31_SIZE)
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#define BL32_BASE 0xfc000000
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#define PLAT_SQ_CCN_BASE 0x32000000
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#define PLAT_SQ_CLUSTER_TO_CCN_ID_MAP \
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0, /* Cluster 0 */ \
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@ -17,10 +17,6 @@ ERRATA_A53_855873 := 1
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# Libraries
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include lib/xlat_tables_v2/xlat_tables.mk
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ifeq (${SPD},opteed)
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TF_CFLAGS_aarch64 += -DBL32_BASE=0xfc000000
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endif
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PLAT_PATH := plat/socionext/synquacer
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PLAT_INCLUDES := -I$(PLAT_PATH)/include \
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-I$(PLAT_PATH)/drivers/scpi \
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@ -76,7 +76,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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/* Initialize power controller before setting up topology */
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plat_sq_pwrc_setup();
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#ifdef BL32_BASE
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#ifdef SPD_opteed
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struct draminfo di = {0};
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scpi_get_draminfo(&di);
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@ -98,7 +98,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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} else {
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NOTICE("OP-TEE has not been loaded by SCP firmware\n");
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}
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#endif /* BL32_BASE */
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#endif /* SPD_opteed */
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/* Populate entry point information for BL33 */
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SET_PARAM_HEAD(&bl33_image_ep_info,
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