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refactor(nxp-clk): organize early clocks in groups

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This reduces the length of the s32cc_init_early_clks function and offers
space for more early clocks to be added.

Change-Id: I0d11b97779433a6b15cd76c36aefbb7b92381067
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
This commit is contained in:
Ghennadi Procopciuc 2024-07-23 12:14:02 +03:00
parent 9babc7c2d6
commit d3869455a6
1 changed files with 58 additions and 22 deletions
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80
drivers/nxp/clk/s32cc/s32cc_early_clks.c
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@ -13,27 +13,32 @@
#define S32CC_ARM_PLL_PHI0_FREQ (1U * GHZ)
#define S32CC_A53_FREQ (1U * GHZ)
int s32cc_init_early_clks(void)
static int enable_fxosc_clk(void)
{
int ret;
s32cc_clk_register_drv();
ret = clk_set_rate(S32CC_CLK_FXOSC, S32CC_FXOSC_FREQ, NULL);
if (ret != 0) {
return ret;
}
ret = clk_enable(S32CC_CLK_FXOSC);
if (ret != 0) {
return ret;
}
return ret;
}
static int enable_arm_pll(void)
{
int ret;
ret = clk_set_parent(S32CC_CLK_ARM_PLL_MUX, S32CC_CLK_FXOSC);
if (ret != 0) {
return ret;
}
ret = clk_set_parent(S32CC_CLK_MC_CGM1_MUX0, S32CC_CLK_ARM_PLL_PHI0);
if (ret != 0) {
return ret;
}
ret = clk_set_rate(S32CC_CLK_FXOSC, S32CC_FXOSC_FREQ, NULL);
if (ret != 0) {
return ret;
}
ret = clk_set_rate(S32CC_CLK_ARM_PLL_VCO, S32CC_ARM_PLL_VCO_FREQ, NULL);
if (ret != 0) {
return ret;
@ -44,16 +49,6 @@ int s32cc_init_early_clks(void)
return ret;
}
ret = clk_set_rate(S32CC_CLK_A53_CORE, S32CC_A53_FREQ, NULL);
if (ret != 0) {
return ret;
}
ret = clk_enable(S32CC_CLK_FXOSC);
if (ret != 0) {
return ret;
}
ret = clk_enable(S32CC_CLK_ARM_PLL_VCO);
if (ret != 0) {
return ret;
@ -64,6 +59,23 @@ int s32cc_init_early_clks(void)
return ret;
}
return ret;
}
static int enable_a53_clk(void)
{
int ret;
ret = clk_set_parent(S32CC_CLK_MC_CGM1_MUX0, S32CC_CLK_ARM_PLL_PHI0);
if (ret != 0) {
return ret;
}
ret = clk_set_rate(S32CC_CLK_A53_CORE, S32CC_A53_FREQ, NULL);
if (ret != 0) {
return ret;
}
ret = clk_enable(S32CC_CLK_A53_CORE);
if (ret != 0) {
return ret;
@ -71,3 +83,27 @@ int s32cc_init_early_clks(void)
return ret;
}
int s32cc_init_early_clks(void)
{
int ret;
s32cc_clk_register_drv();
ret = enable_fxosc_clk();
if (ret != 0) {
return ret;
}
ret = enable_arm_pll();
if (ret != 0) {
return ret;
}
ret = enable_a53_clk();
if (ret != 0) {
return ret;
}
return ret;
}