Merge "fix(cpus): workaround for Cortex-X3 erratum 2372204" into integration

This commit is contained in:
Mark Dykes 2024-03-01 16:33:36 +01:00 committed by TrustedFirmware Code Review
commit d0decb0254
4 changed files with 22 additions and 6 deletions

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@ -787,6 +787,10 @@ For Cortex-X3, the following errata build flags are defined :
Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0
of the CPU, it is fixed in r1p1. of the CPU, it is fixed in r1p1.
- ``ERRATA_X3_2372204``: This applies errata 2372204 workaround to
Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0
of the CPU, it is fixed in r1p1.
- ``ERRATA_X3_2615812``: This applies errata 2615812 workaround to Cortex-X3 - ``ERRATA_X3_2615812``: This applies errata 2615812 workaround to Cortex-X3
CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
CPU, it is still open. CPU, it is still open.

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@ -51,6 +51,13 @@ workaround_runtime_end cortex_x3, ERRATUM(2313909), NO_ISB
check_erratum_ls cortex_x3, ERRATUM(2313909), CPU_REV(1, 0) check_erratum_ls cortex_x3, ERRATUM(2313909), CPU_REV(1, 0)
workaround_reset_start cortex_x3, ERRATUM(2372204), ERRATA_X3_2372204
/* Set bit 40 in CPUACTLR2_EL1 */
sysreg_bit_set CORTEX_X3_CPUACTLR2_EL1, BIT(40)
workaround_reset_end cortex_x3, ERRATUM(2372204)
check_erratum_ls cortex_x3, ERRATUM(2372204), CPU_REV(1, 0)
workaround_reset_start cortex_x3, ERRATUM(2615812), ERRATA_X3_2615812 workaround_reset_start cortex_x3, ERRATUM(2615812), ERRATA_X3_2615812
/* Disable retention control for WFI and WFE. */ /* Disable retention control for WFI and WFE. */
mrs x0, CORTEX_X3_CPUPWRCTLR_EL1 mrs x0, CORTEX_X3_CPUPWRCTLR_EL1

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@ -790,6 +790,10 @@ CPU_FLAG_LIST += ERRATA_X3_2302506
# to revisions r0p0 and r1p0 of the Cortex-X3 cpu, it is fixed in r1p1. # to revisions r0p0 and r1p0 of the Cortex-X3 cpu, it is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_X3_2313909 CPU_FLAG_LIST += ERRATA_X3_2313909
# Flag to apply erratum 2372204 workaround during reset. This erratum applies
# to revisions r0p0 and r1p0 of the Cortex-X3 cpu, it is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_X3_2372204
# Flag to apply erratum 2615812 workaround on powerdown. This erratum applies # Flag to apply erratum 2615812 workaround on powerdown. This erratum applies
# to revisions r0p0, r1p0, r1p1 of the Cortex-X3 cpu, it is still open. # to revisions r0p0, r1p0, r1p1 of the Cortex-X3 cpu, it is still open.
CPU_FLAG_LIST += ERRATA_X3_2615812 CPU_FLAG_LIST += ERRATA_X3_2615812

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@ -451,12 +451,13 @@ struct em_cpu_list cpu_list[] = {
[1] = {2266875, 0x00, 0x10, ERRATA_X3_2266875}, [1] = {2266875, 0x00, 0x10, ERRATA_X3_2266875},
[2] = {2302506, 0x00, 0x11, ERRATA_X3_2302506}, [2] = {2302506, 0x00, 0x11, ERRATA_X3_2302506},
[3] = {2313909, 0x00, 0x10, ERRATA_X3_2313909}, [3] = {2313909, 0x00, 0x10, ERRATA_X3_2313909},
[4] = {2615812, 0x00, 0x11, ERRATA_X3_2615812}, [4] = {2372204, 0x00, 0x10, ERRATA_X3_2372204},
[5] = {2641945, 0x00, 0x10, ERRATA_X3_2641945}, [5] = {2615812, 0x00, 0x11, ERRATA_X3_2615812},
[6] = {2742421, 0x00, 0x11, ERRATA_X3_2742421}, [6] = {2641945, 0x00, 0x10, ERRATA_X3_2641945},
[7] = {2743088, 0x00, 0x11, ERRATA_X3_2743088}, [7] = {2742421, 0x00, 0x11, ERRATA_X3_2742421},
[8] = {2779509, 0x00, 0x11, ERRATA_X3_2779509}, [8] = {2743088, 0x00, 0x11, ERRATA_X3_2743088},
[9 ... ERRATA_LIST_END] = UNDEF_ERRATA, [9] = {2779509, 0x00, 0x11, ERRATA_X3_2779509},
[10 ... ERRATA_LIST_END] = UNDEF_ERRATA,
} }
}, },
#endif /* CORTEX_X3_H_INC */ #endif /* CORTEX_X3_H_INC */