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fix(errata): workaround for Cortex-A710 erratum 2267065

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Cortex-A710 erratum 2267065 is a Cat B erratum that applies to
revisions r0p0, r1p0 and r2p0 of the CPU. It is fixed in r2p1.
The workaround is to set CPUACTLR_EL1[22] to 1'b1. Setting
CPUACTLR_EL1[22] will cause the CFP instruction to invalidate
all branch predictor resources regardless of context.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775101/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ia9085aaf9b2b6a2b25d03ab36bd3774839fac9aa
This commit is contained in:
Bipin Ravi 2022-02-06 02:32:54 -06:00
parent 4dff7594f9
commit cfe1a8f712
4 changed files with 49 additions and 0 deletions
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4
docs/design/cpu-specific-build-macros.rst
View file

@ -409,6 +409,10 @@ For Cortex-A710, the following errata build flags are defined :
Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
of the CPU and is still open. of the CPU and is still open.
- ``ERRATA_A710_2267065``: This applies errata 2267065 workaround to
Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
of the CPU and is fixed in r2p1.
For Neoverse N2, the following errata build flags are defined : For Neoverse N2, the following errata build flags are defined :
- ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2 - ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2

1
include/lib/cpus/aarch64/cortex_a710.h
View file

@ -26,6 +26,7 @@
******************************************************************************/ ******************************************************************************/
#define CORTEX_A710_CPUACTLR_EL1 S3_0_C15_C1_0 #define CORTEX_A710_CPUACTLR_EL1 S3_0_C15_C1_0
#define CORTEX_A710_CPUACTLR_EL1_BIT_46 (ULL(1) << 46) #define CORTEX_A710_CPUACTLR_EL1_BIT_46 (ULL(1) << 46)
#define CORTEX_A710_CPUACTLR_EL1_BIT_22 (ULL(1) << 22)
/******************************************************************************* /*******************************************************************************
* CPU Auxiliary Control register specific definitions. * CPU Auxiliary Control register specific definitions.

36
lib/cpus/aarch64/cortex_a710.S
View file

@ -216,6 +216,35 @@ func check_errata_2058056
b cpu_rev_var_ls b cpu_rev_var_ls
endfunc check_errata_2058056 endfunc check_errata_2058056
/* --------------------------------------------------
* Errata Workaround for Cortex-A710 Erratum 2267065.
* This applies to revisions r0p0, r1p0 and r2p0.
* It is fixed in r2p1.
* Inputs:
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x1, x17
* --------------------------------------------------
*/
func errata_a710_2267065_wa
/* Compare x0 against revision r2p0 */
mov x17, x30
bl check_errata_2267065
cbz x0, 1f
/* Apply instruction patching sequence */
mrs x1, CORTEX_A710_CPUACTLR_EL1
orr x1, x1, CORTEX_A710_CPUACTLR_EL1_BIT_22
msr CORTEX_A710_CPUACTLR_EL1, x1
1:
ret x17
endfunc errata_a710_2267065_wa
func check_errata_2267065
/* Applies to r0p0, r1p0 and r2p0 */
mov x1, #0x20
b cpu_rev_var_ls
endfunc check_errata_2267065
/* ---------------------------------------------------- /* ----------------------------------------------------
* HW will do the cache maintenance while powering down * HW will do the cache maintenance while powering down
* ---------------------------------------------------- * ----------------------------------------------------
@ -252,6 +281,7 @@ func cortex_a710_errata_report
report_errata ERRATA_A710_2017096, cortex_a710, 2017096 report_errata ERRATA_A710_2017096, cortex_a710, 2017096
report_errata ERRATA_A710_2083908, cortex_a710, 2083908 report_errata ERRATA_A710_2083908, cortex_a710, 2083908
report_errata ERRATA_A710_2058056, cortex_a710, 2058056 report_errata ERRATA_A710_2058056, cortex_a710, 2058056
report_errata ERRATA_A710_2267065, cortex_a710, 2267065
ldp x8, x30, [sp], #16 ldp x8, x30, [sp], #16
ret ret
@ -296,6 +326,12 @@ func cortex_a710_reset_func
mov x0, x18 mov x0, x18
bl errata_a710_2058056_wa bl errata_a710_2058056_wa
#endif #endif
#if ERRATA_A710_2267065
mov x0, x18
bl errata_a710_2267065_wa
#endif
isb isb
ret x19 ret x19
endfunc cortex_a710_reset_func endfunc cortex_a710_reset_func

8
lib/cpus/cpu-ops.mk
View file

@ -495,6 +495,10 @@ ERRATA_A710_2055002 ?=0
# to revision r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is still open. # to revision r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is still open.
ERRATA_A710_2017096 ?=0 ERRATA_A710_2017096 ?=0
# Flag to apply erratum 2267065 workaround during reset. This erratum applies
# to revision r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is fixed in r2p1.
ERRATA_A710_2267065 ?=0
# Flag to apply erratum 2002765 workaround during reset. This erratum applies # Flag to apply erratum 2002765 workaround during reset. This erratum applies
# to revisions r0p0, r1p0, and r2p0 of the Cortex-X2 cpu and is still open. # to revisions r0p0, r1p0, and r2p0 of the Cortex-X2 cpu and is still open.
ERRATA_X2_2002765 ?=0 ERRATA_X2_2002765 ?=0
@ -947,6 +951,10 @@ $(eval $(call add_define,ERRATA_A710_2055002))
$(eval $(call assert_boolean,ERRATA_A710_2017096)) $(eval $(call assert_boolean,ERRATA_A710_2017096))
$(eval $(call add_define,ERRATA_A710_2017096)) $(eval $(call add_define,ERRATA_A710_2017096))
# Process ERRATA_A710_2267065 flag
$(eval $(call assert_boolean,ERRATA_A710_2267065))
$(eval $(call add_define,ERRATA_A710_2267065))
# Process ERRATA_X2_2002765 flag # Process ERRATA_X2_2002765 flag
$(eval $(call assert_boolean,ERRATA_X2_2002765)) $(eval $(call assert_boolean,ERRATA_X2_2002765))
$(eval $(call add_define,ERRATA_X2_2002765)) $(eval $(call add_define,ERRATA_X2_2002765))