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https://github.com/ARM-software/arm-trusted-firmware.git
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feat(st-uart): add AARCH64 stm32_console driver
It is an adaptation for AARCH64 of the already existing AARCH32 driver. Change-Id: Ifabf716a6bd188d2249650a34bbec1a602bcb017 Signed-off-by: Yann Gautier <yann.gautier@st.com>
This commit is contained in:
Yann Gautier
parent
35527fb418
commit
c6d070cdba
1 changed files with 255 additions and 0 deletions
255
drivers/st/uart/aarch64/stm32_console.S
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255
drivers/st/uart/aarch64/stm32_console.S
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/*
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* Copyright (C) 2023, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm_macros.S>
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#include <assert_macros.S>
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#include <console_macros.S>
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#include <drivers/st/stm32_console.h>
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#include <drivers/st/stm32_uart_regs.h>
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#define USART_TIMEOUT 0x1000
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/*
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* "core" functions are low-level implementations that don't require
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* writeable memory and are thus safe to call in BL1 crash context.
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*/
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.globl console_stm32_core_init
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.globl console_stm32_core_putc
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.globl console_stm32_core_getc
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.globl console_stm32_core_flush
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.globl console_stm32_putc
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.globl console_stm32_flush
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/* -----------------------------------------------------------------
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* int console_core_init(uintptr_t base_addr,
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* unsigned int uart_clk,
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* unsigned int baud_rate)
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*
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* Function to initialize the console without a C Runtime to print
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* debug information. This function will be accessed by console_init
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* and crash reporting.
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*
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* In: x0 - console base address
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* w1 - Uart clock in Hz
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* w2 - Baud rate
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* Out: return 1 on success else 0 on error
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* Clobber list : x1, x2, x3, x4
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* -----------------------------------------------
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*/
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func console_stm32_core_init
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/* Check the input base address */
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cbz x0, core_init_fail
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#if !defined(IMAGE_BL2)
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#if STM32MP_RECONFIGURE_CONSOLE
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/* UART clock rate is set to 0 in BL32, skip init in that case */
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cbz x1, 1f
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#else /* STM32MP_RECONFIGURE_CONSOLE */
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/* Skip UART initialization if it is already enabled */
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ldr w3, [x0, #USART_CR1]
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tst w3, #USART_CR1_UE
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b.ne 1f
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#endif /* STM32MP_RECONFIGURE_CONSOLE */
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#endif /* IMAGE_BL2 */
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/* Check baud rate and uart clock for sanity */
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cbz w1, core_init_fail
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cbz w2, core_init_fail
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/* Disable UART */
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ldr w3, [x0, #USART_CR1]
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mov w4, #USART_CR1_UE
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bic w3, w3, w4
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str w3, [x0, #USART_CR1]
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/* Configure UART */
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mov w4, #(USART_CR1_TE)
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orr w4, w4, #(USART_CR1_FIFOEN)
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orr w3, w3, w4
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str w3, [x0, #USART_CR1]
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ldr w3, [x0, #USART_CR2]
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mov w4, #USART_CR2_STOP
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bic w3, w3, w4
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str w3, [x0, #USART_CR2]
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/* Divisor = (Uart clock + (baudrate / 2)) / baudrate */
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lsr w3, w2, #1
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add w3, w1, w3
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udiv w3, w3, w2
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cmp w3, #16
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b.hi 2f
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/* Oversampling 8 */
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/* Divisor = (2 * Uart clock + (baudrate / 2)) / baudrate */
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lsr w3, w2, #1
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add w3, w3, w1, lsl #1
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udiv w3, w3, w2
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and w1, w3, #USART_BRR_DIV_FRACTION
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lsr w1, w1, #1
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bic w3, w3, #USART_BRR_DIV_FRACTION
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orr w3, w3, w1
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ldr w1, [x0, #USART_CR1]
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orr w1, w1, #USART_CR1_OVER8
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str w1, [x0, #USART_CR1]
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2:
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str w3, [x0, #USART_BRR]
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/* Enable UART */
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ldr w3, [x0, #USART_CR1]
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mov w4, #USART_CR1_UE
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orr w3, w3, w4
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str w3, [x0, #USART_CR1]
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/* Check TEACK bit */
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mov w2, #USART_TIMEOUT
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teack_loop:
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subs w2, w2, #1
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beq core_init_fail
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ldr w3, [x0, #USART_ISR]
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tst w3, #USART_ISR_TEACK
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beq teack_loop
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1:
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mov w0, #1
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ret
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core_init_fail:
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mov w0, wzr
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ret
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endfunc console_stm32_core_init
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.globl console_stm32_register
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/* -------------------------------------------------------
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* int console_stm32_register(uintptr_t baseaddr,
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* uint32_t clock, uint32_t baud,
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* console_t *console);
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* Function to initialize and register a new STM32
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* console. Storage passed in for the console struct
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* *must* be persistent (i.e. not from the stack).
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* In: x0 - UART register base address
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* w1 - UART clock in Hz
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* w2 - Baud rate
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* x3 - pointer to empty console_t struct
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* Out: return 1 on success, 0 on error
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* Clobber list : x0, x1, x2, x6, x7, x14
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* -------------------------------------------------------
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*/
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func console_stm32_register
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mov x7, x30
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mov x6, x3
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cbz x6, register_fail
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str x0, [x6, #CONSOLE_T_BASE]
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bl console_stm32_core_init
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cbz x0, register_fail
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mov x0, x6
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mov x30, x7
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finish_console_register stm32 putc=1, getc=0, flush=1
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register_fail:
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ret x7
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endfunc console_stm32_register
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/* --------------------------------------------------------
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* int console_stm32_core_putc(int c, uintptr_t base_addr)
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* Function to output a character over the console. It
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* returns the character printed on success or -1 on error.
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* In : w0 - character to be printed
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* x1 - console base address
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* Out : return -1 on error else return character.
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* Clobber list : x2
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* --------------------------------------------------------
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*/
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func console_stm32_core_putc
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#if ENABLE_ASSERTIONS
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cmp x1, #0
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ASM_ASSERT(ne)
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#endif /* ENABLE_ASSERTIONS */
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/* Check Transmit Data Register Empty */
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txe_loop:
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ldr w2, [x1, #USART_ISR]
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tst w2, #USART_ISR_TXE
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beq txe_loop
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str w0, [x1, #USART_TDR]
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/* Check transmit complete flag */
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tc_loop:
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ldr w2, [x1, #USART_ISR]
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tst w2, #USART_ISR_TC
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beq tc_loop
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ret
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endfunc console_stm32_core_putc
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/* --------------------------------------------------------
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* int console_stm32_putc(int c, console_t *console)
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* Function to output a character over the console. It
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* returns the character printed on success or -1 on error.
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* In : w0 - character to be printed
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* x1 - pointer to console_t structure
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* Out : return -1 on error else return character.
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* Clobber list : x2
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* --------------------------------------------------------
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*/
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func console_stm32_putc
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#if ENABLE_ASSERTIONS
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cmp x1, #0
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ASM_ASSERT(ne)
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#endif /* ENABLE_ASSERTIONS */
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ldr x1, [x1, #CONSOLE_T_BASE]
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b console_stm32_core_putc
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endfunc console_stm32_putc
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/* ---------------------------------------------
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* int console_stm32_core_getc(uintptr_t base_addr)
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* Function to get a character from the console.
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* It returns the character grabbed on success
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* or -1 if no character is available.
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* In : x0 - console base address
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* Out: w0 - character if available, else -1
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* Clobber list : x0, x1
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* ---------------------------------------------
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*/
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func console_stm32_core_getc
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/* Not supported */
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mov w0, #-1
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ret
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endfunc console_stm32_core_getc
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/* ---------------------------------------------
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* int console_stm32_core_flush(uintptr_t base_addr)
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* Function to force a write of all buffered
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* data that hasn't been output.
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* In : x0 - console base address
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* Out : return -1 on error else return 0.
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* Clobber list : x0, x1
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* ---------------------------------------------
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*/
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func console_stm32_core_flush
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#if ENABLE_ASSERTIONS
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cmp x0, #0
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ASM_ASSERT(ne)
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#endif /* ENABLE_ASSERTIONS */
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/* Check Transmit Data Register Empty */
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txe_loop_3:
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ldr w1, [x0, #USART_ISR]
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tst w1, #USART_ISR_TXE
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beq txe_loop_3
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mov w0, #0
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ret
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endfunc console_stm32_core_flush
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/* ---------------------------------------------
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* int console_stm32_flush(console_t *console)
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* Function to force a write of all buffered
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* data that hasn't been output.
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* In : x0 - pointer to console_t structure
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* Out : return -1 on error else return 0.
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* Clobber list : x0, x1
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* ---------------------------------------------
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*/
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func console_stm32_flush
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#if ENABLE_ASSERTIONS
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cmp x0, #0
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ASM_ASSERT(ne)
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#endif /* ENABLE_ASSERTIONS */
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ldr x0, [x0, #CONSOLE_T_BASE]
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b console_stm32_core_flush
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endfunc console_stm32_flush
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