feat(arm_fpga): support GICv4 images

Up until now we relied on the GICs used in our FPGA images to be GICv3
compliant, without the "direct virtual injection" feature (aka GICv4)
enabled.
To support newer images which have GICv4 compliant GICs, enable the
newly introduced GICv4 detection code, and use that also when we adjust
the redistributor region size in the devicetree.

This allows the same BL31 image to be used with GICv3 or GICv4 FPGA
images.

Change-Id: I9f6435a6d5150983625efe3650a8b7d1ef11b1d1
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Andre Przywara 2021-05-18 15:53:05 +01:00
parent 858f40e379
commit c69f815b09
4 changed files with 13 additions and 1 deletions

View file

@ -218,7 +218,7 @@ static void fpga_prepare_dtb(void)
INFO("Adjusting GICR DT region to cover %u cores\n",
nr_cores);
err = fdt_adjust_gic_redist(fdt, nr_cores,
1U << GICR_V3_PCPUBASE_SHIFT);
fpga_get_redist_size());
if (err < 0) {
ERROR("Error %d fixing up GIC DT node\n", err);
}

View file

@ -8,6 +8,7 @@
#include <common/fdt_wrappers.h>
#include <drivers/arm/gicv3.h>
#include <drivers/arm/gic_common.h>
#include <lib/mmio.h>
#include <libfdt.h>
#include <platform_def.h>
@ -82,3 +83,11 @@ unsigned int fpga_get_nr_gic_cores(void)
{
return gicv3_rdistif_get_number_frames(fpga_gicv3_driver_data.gicr_base);
}
uintptr_t fpga_get_redist_size(void)
{
uint64_t typer_val = mmio_read_64(fpga_gicv3_driver_data.gicr_base +
GICR_TYPER);
return gicv3_redist_size(typer_val);
}

View file

@ -25,6 +25,7 @@ void fpga_pwr_gic_on_finish(void);
void fpga_pwr_gic_off(void);
unsigned int plat_fpga_calc_core_pos(uint32_t mpid);
unsigned int fpga_get_nr_gic_cores(void);
uintptr_t fpga_get_redist_size(void);
#endif /* __ASSEMBLER__ */

View file

@ -89,6 +89,8 @@ endif
# Allow detection of GIC-600
GICV3_SUPPORT_GIC600 := 1
GIC_ENABLE_V4_EXTN := 1
# Include GICv3 driver files
include drivers/arm/gic/v3/gicv3.mk