Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-17 10:04:26 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

refactor(st): move GIC code to common directory

Browse source 
The GIC v2 initialization code could be shared to other ST platforms.
The stm32mp1_gic.c file is then moved to common directory, and renamed
stm32mp_gic.c.
The functions are also prefixed with stm32mp_gic.

Change-Id: I60820823b470217d3a95cc569f941c2cb923dfa9
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This commit is contained in:
Yann Gautier 2019-08-06 17:28:23 +02:00
parent d8da13e543
commit c27d8c00fd
6 changed files with 27 additions and 29 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
plat/st/common/include/stm32mp_common.h
View file

@ -35,6 +35,9 @@ uintptr_t stm32mp_pwr_base(void);
/* Return the base address of the RCC peripheral */ /* Return the base address of the RCC peripheral */
uintptr_t stm32mp_rcc_base(void); uintptr_t stm32mp_rcc_base(void);
void stm32mp_gic_pcpu_init(void);
void stm32mp_gic_init(void);
/* Check MMU status to allow spinlock use */ /* Check MMU status to allow spinlock use */
bool stm32mp_lock_available(void); bool stm32mp_lock_available(void);

31
plat/st/stm32mp1/stm32mp1_gic.c → plat/st/common/stm32mp_gic.c
View file

@ -1,21 +1,20 @@
/* /*
* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#include <libfdt.h>
#include <platform_def.h>
#include <common/bl_common.h> #include <common/bl_common.h>
#include <common/debug.h> #include <common/debug.h>
#include <drivers/arm/gicv2.h> #include <drivers/arm/gicv2.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <lib/utils.h> #include <lib/utils.h>
#include <libfdt.h>
#include <plat/common/platform.h> #include <plat/common/platform.h>
struct stm32_gic_instance { #include <platform_def.h>
struct stm32mp_gic_instance {
uint32_t cells; uint32_t cells;
uint32_t phandle_node; uint32_t phandle_node;
}; };
@ -24,7 +23,7 @@ struct stm32_gic_instance {
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
* interrupts. * interrupts.
*****************************************************************************/ *****************************************************************************/
static const interrupt_prop_t stm32mp1_interrupt_props[] = { static const interrupt_prop_t stm32mp_interrupt_props[] = {
PLATFORM_G1S_PROPS(GICV2_INTR_GROUP0), PLATFORM_G1S_PROPS(GICV2_INTR_GROUP0),
PLATFORM_G0_PROPS(GICV2_INTR_GROUP0) PLATFORM_G0_PROPS(GICV2_INTR_GROUP0)
}; };
@ -33,15 +32,15 @@ static const interrupt_prop_t stm32mp1_interrupt_props[] = {
static unsigned int target_mask_array[PLATFORM_CORE_COUNT] = {1, 2}; static unsigned int target_mask_array[PLATFORM_CORE_COUNT] = {1, 2};
static gicv2_driver_data_t platform_gic_data = { static gicv2_driver_data_t platform_gic_data = {
.interrupt_props = stm32mp1_interrupt_props, .interrupt_props = stm32mp_interrupt_props,
.interrupt_props_num = ARRAY_SIZE(stm32mp1_interrupt_props), .interrupt_props_num = ARRAY_SIZE(stm32mp_interrupt_props),
.target_masks = target_mask_array, .target_masks = target_mask_array,
.target_masks_num = ARRAY_SIZE(target_mask_array), .target_masks_num = ARRAY_SIZE(target_mask_array),
}; };
static struct stm32_gic_instance stm32_gic; static struct stm32mp_gic_instance stm32mp_gic;
void stm32mp1_gic_init(void) void stm32mp_gic_init(void)
{ {
int node; int node;
void *fdt; void *fdt;
@ -71,20 +70,20 @@ void stm32mp1_gic_init(void)
panic(); panic();
} }
stm32_gic.cells = fdt32_to_cpu(*cuint); stm32mp_gic.cells = fdt32_to_cpu(*cuint);
stm32_gic.phandle_node = fdt_get_phandle(fdt, node); stm32mp_gic.phandle_node = fdt_get_phandle(fdt, node);
if (stm32_gic.phandle_node == 0U) { if (stm32mp_gic.phandle_node == 0U) {
panic(); panic();
} }
gicv2_driver_init(&platform_gic_data); gicv2_driver_init(&platform_gic_data);
gicv2_distif_init(); gicv2_distif_init();
stm32mp1_gic_pcpu_init(); stm32mp_gic_pcpu_init();
} }
void stm32mp1_gic_pcpu_init(void) void stm32mp_gic_pcpu_init(void)
{ {
gicv2_pcpu_distif_init(); gicv2_pcpu_distif_init();
gicv2_set_pe_target_mask(plat_my_core_pos()); gicv2_set_pe_target_mask(plat_my_core_pos());

5
plat/st/stm32mp1/include/stm32mp1_private.h
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -14,9 +14,6 @@ void configure_mmu(void);
void stm32mp1_arch_security_setup(void); void stm32mp1_arch_security_setup(void);
void stm32mp1_security_setup(void); void stm32mp1_security_setup(void);
void stm32mp1_gic_pcpu_init(void);
void stm32mp1_gic_init(void);
void stm32mp1_syscfg_init(void); void stm32mp1_syscfg_init(void);
void stm32mp1_syscfg_enable_io_compensation_start(void); void stm32mp1_syscfg_enable_io_compensation_start(void);
void stm32mp1_syscfg_enable_io_compensation_finish(void); void stm32mp1_syscfg_enable_io_compensation_finish(void);

4
plat/st/stm32mp1/sp_min/sp_min-stm32mp1.mk
View file

@ -1,5 +1,5 @@
# #
# Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved. # Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
# #
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
@ -32,7 +32,7 @@ include drivers/arm/gic/v2/gicv2.mk
BL32_SOURCES += ${GICV2_SOURCES} \ BL32_SOURCES += ${GICV2_SOURCES} \
plat/common/plat_gicv2.c \ plat/common/plat_gicv2.c \
plat/st/stm32mp1/stm32mp1_gic.c plat/st/common/stm32mp_gic.c
# Generic PSCI # Generic PSCI
BL32_SOURCES += plat/common/plat_psci_common.c BL32_SOURCES += plat/common/plat_psci_common.c

9
plat/st/stm32mp1/sp_min/sp_min_setup.c
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -7,9 +7,8 @@
#include <assert.h> #include <assert.h>
#include <string.h> #include <string.h>
#include <platform_def.h>
#include <arch_helpers.h> #include <arch_helpers.h>
#include <bl32/sp_min/platform_sp_min.h>
#include <common/bl_common.h> #include <common/bl_common.h>
#include <common/debug.h> #include <common/debug.h>
#include <context.h> #include <context.h>
@ -27,7 +26,7 @@
#include <lib/xlat_tables/xlat_tables_v2.h> #include <lib/xlat_tables/xlat_tables_v2.h>
#include <plat/common/platform.h> #include <plat/common/platform.h>
#include <platform_sp_min.h> #include <platform_def.h>
/****************************************************************************** /******************************************************************************
* Placeholder variables for copying the arguments that have been passed to * Placeholder variables for copying the arguments that have been passed to
@ -181,7 +180,7 @@ void sp_min_platform_setup(void)
{ {
generic_delay_timer_init(); generic_delay_timer_init();
stm32mp1_gic_init(); stm32mp_gic_init();
if (stm32_iwdg_init() < 0) { if (stm32_iwdg_init() < 0) {
panic(); panic();

4
plat/st/stm32mp1/stm32mp1_pm.c
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -118,7 +118,7 @@ static void stm32_pwr_domain_suspend(const psci_power_state_t *target_state)
******************************************************************************/ ******************************************************************************/
static void stm32_pwr_domain_on_finish(const psci_power_state_t *target_state) static void stm32_pwr_domain_on_finish(const psci_power_state_t *target_state)
{ {
stm32mp1_gic_pcpu_init(); stm32mp_gic_pcpu_init();
write_cntfrq_el0(cntfrq_core0); write_cntfrq_el0(cntfrq_core0);
} }