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https://github.com/ARM-software/arm-trusted-firmware.git
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refactor(st): move GIC code to common directory
The GIC v2 initialization code could be shared to other ST platforms. The stm32mp1_gic.c file is then moved to common directory, and renamed stm32mp_gic.c. The functions are also prefixed with stm32mp_gic. Change-Id: I60820823b470217d3a95cc569f941c2cb923dfa9 Signed-off-by: Yann Gautier <yann.gautier@st.com>
This commit is contained in:
Yann Gautier
parent
d8da13e543
commit
c27d8c00fd
6 changed files with 27 additions and 29 deletions
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@ -35,6 +35,9 @@ uintptr_t stm32mp_pwr_base(void);
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/* Return the base address of the RCC peripheral */
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uintptr_t stm32mp_rcc_base(void);
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void stm32mp_gic_pcpu_init(void);
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void stm32mp_gic_init(void);
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/* Check MMU status to allow spinlock use */
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bool stm32mp_lock_available(void);
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@ -1,21 +1,20 @@
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/*
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* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <libfdt.h>
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#include <platform_def.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <drivers/arm/gicv2.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <lib/utils.h>
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#include <libfdt.h>
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#include <plat/common/platform.h>
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struct stm32_gic_instance {
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#include <platform_def.h>
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struct stm32mp_gic_instance {
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uint32_t cells;
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uint32_t phandle_node;
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};
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@ -24,7 +23,7 @@ struct stm32_gic_instance {
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* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
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* interrupts.
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*****************************************************************************/
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static const interrupt_prop_t stm32mp1_interrupt_props[] = {
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static const interrupt_prop_t stm32mp_interrupt_props[] = {
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PLATFORM_G1S_PROPS(GICV2_INTR_GROUP0),
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PLATFORM_G0_PROPS(GICV2_INTR_GROUP0)
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};
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@ -33,15 +32,15 @@ static const interrupt_prop_t stm32mp1_interrupt_props[] = {
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static unsigned int target_mask_array[PLATFORM_CORE_COUNT] = {1, 2};
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static gicv2_driver_data_t platform_gic_data = {
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.interrupt_props = stm32mp1_interrupt_props,
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.interrupt_props_num = ARRAY_SIZE(stm32mp1_interrupt_props),
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.interrupt_props = stm32mp_interrupt_props,
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.interrupt_props_num = ARRAY_SIZE(stm32mp_interrupt_props),
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.target_masks = target_mask_array,
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.target_masks_num = ARRAY_SIZE(target_mask_array),
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};
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static struct stm32_gic_instance stm32_gic;
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static struct stm32mp_gic_instance stm32mp_gic;
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void stm32mp1_gic_init(void)
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void stm32mp_gic_init(void)
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{
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int node;
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void *fdt;
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@ -71,20 +70,20 @@ void stm32mp1_gic_init(void)
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panic();
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}
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stm32_gic.cells = fdt32_to_cpu(*cuint);
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stm32mp_gic.cells = fdt32_to_cpu(*cuint);
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stm32_gic.phandle_node = fdt_get_phandle(fdt, node);
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if (stm32_gic.phandle_node == 0U) {
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stm32mp_gic.phandle_node = fdt_get_phandle(fdt, node);
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if (stm32mp_gic.phandle_node == 0U) {
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panic();
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}
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gicv2_driver_init(&platform_gic_data);
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gicv2_distif_init();
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stm32mp1_gic_pcpu_init();
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stm32mp_gic_pcpu_init();
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}
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void stm32mp1_gic_pcpu_init(void)
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void stm32mp_gic_pcpu_init(void)
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{
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gicv2_pcpu_distif_init();
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gicv2_set_pe_target_mask(plat_my_core_pos());
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -14,9 +14,6 @@ void configure_mmu(void);
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void stm32mp1_arch_security_setup(void);
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void stm32mp1_security_setup(void);
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void stm32mp1_gic_pcpu_init(void);
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void stm32mp1_gic_init(void);
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void stm32mp1_syscfg_init(void);
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void stm32mp1_syscfg_enable_io_compensation_start(void);
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void stm32mp1_syscfg_enable_io_compensation_finish(void);
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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@ -32,7 +32,7 @@ include drivers/arm/gic/v2/gicv2.mk
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BL32_SOURCES += ${GICV2_SOURCES} \
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plat/common/plat_gicv2.c \
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plat/st/stm32mp1/stm32mp1_gic.c
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plat/st/common/stm32mp_gic.c
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# Generic PSCI
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BL32_SOURCES += plat/common/plat_psci_common.c
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -7,9 +7,8 @@
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#include <assert.h>
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#include <string.h>
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#include <platform_def.h>
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#include <arch_helpers.h>
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#include <bl32/sp_min/platform_sp_min.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <context.h>
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@ -27,7 +26,7 @@
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <plat/common/platform.h>
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#include <platform_sp_min.h>
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#include <platform_def.h>
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/******************************************************************************
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* Placeholder variables for copying the arguments that have been passed to
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@ -181,7 +180,7 @@ void sp_min_platform_setup(void)
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{
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generic_delay_timer_init();
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stm32mp1_gic_init();
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stm32mp_gic_init();
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if (stm32_iwdg_init() < 0) {
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panic();
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -118,7 +118,7 @@ static void stm32_pwr_domain_suspend(const psci_power_state_t *target_state)
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******************************************************************************/
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static void stm32_pwr_domain_on_finish(const psci_power_state_t *target_state)
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{
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stm32mp1_gic_pcpu_init();
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stm32mp_gic_pcpu_init();
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write_cntfrq_el0(cntfrq_core0);
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}
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